• Journal of the Korean Society of Manufacturing Process Engineers
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• v.19 no.8
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• pp.73-80
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• 2020

The 3D printing of electronics has been a major application topics in additive manufacturing technology for a decade. In this paper, wireless power transfer (WPT) technology for 3D electronics is studied to supply electric power to its inner circuit. The principle of WPT is that electric power is induced at the recipient antenna coil under an alternating magnetic field. Importantly, the efficiency of WPT does rely on the design of the antenna coil shape. In 3D printed electronics, a flat antenna that can be placed on the printed plane within a layer of a 3D printed part is used, but provided a different antenna response compared to that of a conventional PCB antenna for NFC. This paper investigates the WPT response characteristics of a WPT antenna for 3D printed electronics associated with changes in its design elements. The effects of changing the antenna curvature and the gap between the wires were analyzed through experimental tests.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.20 no.5
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• pp.559-563
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• 2011

Drop impact reliability assessment of solder joints on the flip chip is one of the critical issues for micro system packaging. Our previous researches have been showing that new solder ball compositions of Sn-3.0Ag-0.5Cu has better mechanical reliability than Sn-1.0Ag-0.5Cu. In this paper, dynamic reliability analysis using Finite Element Analysis (FEA) is carried out to assess the factors affecting flip chip in drop simulation. The design parameters are size and thickness of chip, and size, pitch and array of solder ball with composition of Sn1.0Ag0.5Cu. The board systems by JEDEC standard including 15 chips, solder balls and PCB are modeled with various design parameter combinations, and through these simulations, maximum yield stress and strain at each chip are shown at the solder balls. It is found that larger chip size, smaller chip array, smaller ball diameter, larger pitch, and larger chip thickness have bad effect on maximum yield stress and strain at solder ball of each chip.

• Journal of Power Electronics
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• v.11 no.4
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• pp.527-532
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• 2011

Due to the need for improved fuel consumption and the trend towards increasing the electrical content in automobiles, integrated starter generator (ISG) systems are being considered by the automotive industry. In this paper, in order to change the conventional generator of a vehicle, a belt driven integrated starter generator is considered. The overall ISG system, the design considerations for the claw pole type AC electric machine and a low voltage very high current power stage implementation are discussed. Test data on the low voltage claw pole type machine is presented, and a large current voltage source DC/AC inverter suitable for low voltage integrated starter generator operation is also presented. A metal based PCB (Printed Circuit Board) power unit to attach the 4-parallel MOS-FETs is used to achieve extremely high current capability. Furthermore, issues related to the torque assistance during vehicle acceleration and the generation/regeneration characteristics are discussed. A prototype with the capability of up to 1000 A and 27 V is designed and built to validate the kilo-amp inverter.

• Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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• 2003.04a
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• pp.25-39
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• 2003

Risk and exposure assessment for subsurface environment is very important for both aspects of health and environmental protection as well as making decision of remedial goal for engineering activities. Exposure due to hazardous chemicals in the subsurface environment is essential to assess risk lev121 to individual person, especially from soil and groundwater environmental media. In this paper, the status of soil and groundwater contamination is presented to discuss on the problem for environmental risk assessment. The methodologies of fate and exposure models are also discussed by conducting the case studies of exposure assessment for heavy metals, organic compounds, and dioxin compounds. In addition, the structure of exposure models and available data for model calculation are examined to make clear more realistic exposure scenarios and the application to the practical environmental issues. Three kinds of advanced remediation techniques for soil and groundwater contamination are described in this paper, The most practical method for VOCs is the bio-remediation technique in which biological process due to consortium of microorganisms can be applied. For more effective remediation of soil contaminated by heavy metals we have adopted the soil flushing technique and clean-up system using electro-kinetic method. We have also developed the advanced techniques of geo-melting method for soil contaminated by DXNs and PCB compounds. These techniques are planed to introduce and to apply for a lot of contaminated sites in Japan.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.10
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• pp.1061-1070
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• 2002

In this paper, we present a performance analysis of the smart antenna test-bed operating in a IS2000 1x through a test-bed that has been implemented on a DSP(TMS320C6711) board. The test-bed consists of a PC (for generating the RX data), beam-former(i.e., a stand-alone PCB for weight computation), and an interfacing module. The performance improvements compared to a normal base station system consisting of a single antenna are shown in terms the BER(bit error rate) in the wide-band CDMA channel.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.9
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• pp.916-921
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• 2009

The technology to inspect and measure an inner structure of micro parts has become an important tool in the semi-conductor industrial field with the development of automation and precision manufacturing. Especially, the inspection skill on the inside of highly integrated electronic device becomes a key role in detecting defects of a completely assembled product. X-ray inspection technology has been focused as a main method to inspect the inside structure. However, there has been insufficient research done on the customized inspection technology for the flip-chip assembly due to the interior connecting part of flip chip which connects the die and PCB electrically through balls positioned on the die. In this study, therefore, it is implemented to detect shape error of flip chip bonding without damaging chips using an x-ray inspection system. At this time, it is able to monitor the solder bump shape by introducing an edge-extracting algorithm (exponential approximation function) according to the attenuating characteristic and detect shape error compared with CAD data. Additionally, the bonding error of solder bumps is automatically detectable by acquiring numerical size information at the extracted solder bump edges.

• The Bulletin of The Korean Astronomical Society
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• v.37 no.2
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• pp.228.1-228.1
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• 2012

Digital waveform generation technology for SAR payload can be divided into DDS(Direct Digital Synthesizer) method and Memory Mapped(M/M) method. DDS is the single chip which consists of the Sine Table, NCO(Numerically Controlled Oscillator), DAC, and so on. DDS method is a very simple method because the circuit configuration is not complex but has a disadvantage that can not control phase and amplitude easily by using NCO. M/M method has the complexity of the circuit configuration because it requires the memories which stores the waveforms, the control circuits, and DAC. And this method should apply the high interface technology for being compatible with the wide bandwidth of the digital signal and has the difficulty for PCB design because the number of the signal lines should be increased according to the number of the data bits for DAC. Although it has several disadvantages, this method has the capability of pre-distortion function which can compensate the phase and amplitude characteristics of the system and also has an excellent advantage to make any arbitrary waveform, so this method is considered as an important technology with DDS method. This research describes the technological trends of the waveform generator for the SAR payload and analyzes the characteristics of the technology.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1587-1588
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• 2006

Tn this paper, PCB (Printed Circuit Board) embedded $BaTiO_3$ MIM capacitors were designed, fabricated, and characterized for low cost organic SOP applications by using 3-D EM simulator and low temperature processes. Size of electrodes and thickness of high dielectric films are optimized for improving the performance characteristics of the proposed embedded MIM capacitors at high frequency regime. The selected thicknesses of the $BaTiO_3$ film are $12{\mu}m$, $16{\mu}m$, and $20{\mu}m$. The fabricated MIM capacitor with dielectric constant of 30 and thickness of $12{\mu}m$ has capacitance density of $21.5p\;F/mm^2$ at 100MHz, maximum quality factor of 37.4 at 300 MHz, a quality factor of 30.9 at 1GHz, self resonant frequency of 5.4 GHz, respectively. The measured capacitances and quality factors are well matched with 3-D EM simulated ones. These embedded capacitors are promising for SOP based advanced electronic systems with various functionality, low cost, small size and volume.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.8 no.2
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• pp.147-151
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• 2015

In this paper, the performance variation of a planar circular monopole antenna is studied, when this antenna is fabricated to film type and installed in the space between case and PCB of UWB terminal. When the circular monopole part has the 'ㄷ' folded structure, the input impedance and return loss, bandwidth, radiation pattern of this antenna are simulated and measured. Then the performance variation is compared with conventional planar antenna. As the results, the folded type circular antenna is usable as a intenna of UWB communication terminal, because of the good return loss and radiation pattern performance in the 2.6 - 12 GHz including the UWB frequency band.

• The KIPS Transactions:PartC
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• v.15C no.4
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• pp.239-244
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• 2008

It is not enough to reduce damages of computer systems by just patching vulnerability codes after incidents occur. It is necessary to detect and block intrusions by boosting the durability of systems even if there are vulnerable codes in systems. This paper proposes a robust real-time intrusion detection method by monitoring root privileged processes instead of system administrators in Linux systems. This method saves IP addresses of users in the process table and monitors IP addresses of every root privileged process. The proposed method is verified to protect vulnerable programs against the buffer overflow by using KON program. A configuration protocol is proposed to manage systems remotely and host IP addresses are protected from intrusions safely through this protocol.