• Proceedings of the Korean Operations and Management Science Society Conference
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• 2004.05a
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• pp.632-635
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• 2004

PCB assembly is a complicated and difficult process to optimize due to the necessity of simultaneous consideration of rack assignment and board mounting sequencing. An efficient component mounting method is developed using component gathering phenomenon. It is found that same components are located closely each other by checking PCBs in field and interviewing PCB designers. A new method counting this phenomenon is developed and it is performed better with more number of total components and more number of gathered components cases. Simulation models are developed using Visual C++ for performance evaluation of the heuristic.

• Journal of information and communication convergence engineering
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• v.21 no.1
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• pp.24-31
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• 2023

The solid-state drive (SSD) possesses higher input and output speeds, more resistance to physical shock, and lower latency compared with regular hard disks; hence, it is an increasingly popular storage device. However, tiny components on an internal printed circuit board (PCB) hinder the manual detection of malfunctioning components. With the rapid development of artificial intelligence technologies, automatic detection of components through convolutional neural networks (CNN) can provide a sound solution for this area. This study proposes applying the YOLOv5 model to SSD PCB component detection, which is the first step in detecting defective components. It achieves pioneering state-of-the-art results on the SSD PCB dataset. Contrast experiments are conducted with YOLOX, a neck-and-neck model with YOLOv5; evidently, YOLOv5 obtains an mAP@0.5 of 99.0%, essentially outperforming YOLOX. These experiments prove that the YOLOv5 model is effective for tiny object detection and can be used to study the second step of detecting defective components in the future.

• Journal of the Korea Society for Simulation
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• v.14 no.2
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• pp.25-34
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• 2005

Determination of component mounting sequence on printed circuit board assembly process is a typical NP-hard problem. It is a kind of traveling salesman problems, but it has one more hard to meet constraint of matching component type per mounting position as well as searching the shortest path. An efficient method is developed by separation of crowed area and allowing up to two slots per component type. A simulation model is constructed using Visual C++ for evaluation of the suggested heuristic.

• Journal of the Korean Society for Precision Engineering
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• v.15 no.5
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• pp.9-18
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• 1998

The components with J-lead. which are more integrated and smaller than ones with Gull-wing. are rapidly being used in electronic board such as the PCB, for they have the advantage of occupying a small space compared to the other components. However, the development of inspection system for these new components is not so rapid as component development. Component-inspection with J-lead using vision system is difficult because they are hidden from camera optical axis. X-ray inspection, which has the advantage of inspecting the inside of solder state, is used to J-lead inspection. However. it is high cost and dangerous by leaking out X-ray compared to vision system. Therefore, in this paper, we design vision system suited to J-lead inspection and then propose algorithm which have flexibility in mount and rand error.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.605-608
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• 1996

The aim of this thesis is to develop a SMT-components placement inspection system equipped with a visual sensor. The visual sensor, which consists of a camera and 2-layer LED illuminator, developed to inspect the component placement state such as missing, shift, flipping, polarity and tomb-stone. on PCB in the reflow-process. In practical applications, however, it is too hard to classify component from images mixed pad on PCB, cream solder paste and component. To overcome the problem, this thesis proposes the 2-layer illumination method and the heuristic image processing algorithms according to inspection type. To show the effectiveness of the proposed approach, a series of experiments on the inspection were conducted. The results show that the proposed method is robust to visual noise and variations in component conditions.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.104-115
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• 1994

This paper presents the design of a placement sysyem integrated in PCB design system. to get an optimal component positioning from part and net list. Unplaced components are placed in initial process using modified cluster development algorithm and are swapped in improvement process using the GFDR(Generalized Force Directed Relaxation) algorithm. The result is optimized in post process by component rotating or pin/gate swapping. Experimental results shwo that the placement system produces manufacturable layouts which are optimal in terms of total routing length.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 1992.10a
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• pp.141-146
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• 1992

본 연구에서는 먼저 낙하 충격을 받는 전자 제품을 수학적인 모델링을 행하 므로서 낙하 충격시 제품이 받게되는 충격력을 정량화하였고, 전자 제품내 많은 부품들의 낙하충격에 대한 동특성해석의 일환으로 핵심 부품인 PCB(printed circuit board)를 해석하였다. PCB 해석을 위하여 유한요소법을 사용하였고, PCB에 작용하는 half-sine pulse의 속도 변화에 다른 가속도 응 답 및 최대 충격가속도, 주기의 변화에 다른 PCB의 가속도 응답을 해석하였 다. 제시된 해석 기법은 낙하충격에 대비한 적절한 electric component의 layout및 최적의 PCB 취부조건등의 결정을 가능케 함으로써, 설계단계에서 낙하 충격을 고려한 PCB설계가 될 수 있도록 그 활용 방안을 제시하였고 반복된 낙하충격 실험을 줄일 수 있으므로 경비 절감 및 개발 소요기간도 절감할 수 있다.

• IE interfaces
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• v.18 no.3
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• pp.297-307
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• 2005

PCB assembly is a complicated and difficult process to optimize due to the necessity of simultaneous consideration of component’s rack assignment and board mounting sequencing. An efficient PCB assembly method is developed by using neighboring positioned identical components information as well as quantity and size of the components. It is found that same type of components are located closely each other by checking real PCBs and interviewing with PCB designers in practice. Better performance of the developed procedure is obtained along with more number of total components and more number of neighboring positioned identical components cases. Simulation models are developed using Visual C++ for performance evaluation purposes of the suggested heuristic.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2003.05a
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• pp.741-743
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• 2003

A surface mount machine operation policy to assemble printed circuit boards is being developed in this research. The policy includes how to assign electronic components to slots on a component rack, and how to determine placement sequences on printed circuit board. The suggested heuristic uses information about component types and closeness relationships in each component on the board to assemble. First, the size of components and closeness ratings are used to divide them into two different size groups. Then rack assignment and placement routes are developed using component type and quantity information for a small size group, and followed by a large size group. Simulation models are developed using Visual C++ for performance evaluation of the heuristic. Necessary statistical analyses are provided to show the effectiveness of the suggested heuristic.

• IE interfaces
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• v.10 no.1
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• pp.155-167
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• 1997

The purpose of this study is to develop the program for efficient operation of a multi-functional surface mounting device(SMD) which mount various components on a printed circuit board(PCB). These components are provided by diverse types of feeders such as cassette, stick and tray feeders. The SMD has one or two heads. In the SMD, the positions of PCB and feeders and fixed, and the head moves to pick up a component from a feeder and to mount it on the PCB. The number of lanes occupied by each feeder and the nozzle used for each component can be different. We develop an off-line program to minimize the cycle-time of the SMD by studying the optimal assignment of feeders and the optimal mounting sequence of components. Graphical User Interface(GUI) is also developed. Additionally, we consider the line balancing problem which appears when two SMDs are used sequentially.