• Title/Summary/Keyword: PC코어

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Proposal of PC Core System for Modular Housing (모듈러주택 적용을 위한 PC코어 시스템 제안)

  • Minjun, Kim
    • Land and Housing Review
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    • v.14 no.1
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    • pp.115-122
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    • 2023
  • Modular construction is popular as a smart building system because it can shorten the construction period. This study proposed a precast concrete (PC) core system that can further shorten modular construction time. The system was developed and its structural performance was verified through computational analysis. The proposed PC core system is a complete PC construction method using dry bonding. The results of the study indicated that the proposed PC core system has structural stability and performance suitable for modular housing.

OnExpo HOT&COOL / COOL COMPANY 어뮤즈텍

  • O, Suk-Hyeon
    • Digital Contents
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    • no.12 s.127
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    • pp.78-79
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    • 2003
  • 음악을 더 재미있게! 더 편리하게! 종이악보에도 디지털 바람이 불었다. 그리고 그 바람의 선두에는 뮤즈북 스코어(www.musebook.co.kr)가 있다. 뮤즈북 스코어는 최근 개발 된 태블릿 PC를 이용해 수만 장의 악보를 저장해 연주할 수 있는 프로그램으로 음악인식기술을 이용한‘음악인식 전자악보’이다. 피아노 악보대에 종이악보 대신 태블릿 PC를 올려놓고 하드디스크에 저장된 MusicXLM 전자악보들을 마음대로 불러서 사용하는 뮤즈북 스코어는 피아노를 연주 하면 태블릿 PC의 마이크로 소리를 듣고 분석해 자동으로 페이지를 넘겨준다. 사용자의 연주속도 가 빨라지거나 느려지더라도 현재 연주위치를 계 속 추적하기 때문에 사용자는 연주에만 집중할 수 있다.

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Development of Hybrid Panel with C-shaped Steel Beam at Top and Bottom of Precast Concrete Wall (프리캐스트 콘크리트 벽체의 상하부에 C형강 보가 결합된 복합 패널의 개발)

  • Lee, Sang Sup;Park, Keum Sung
    • Journal of Korean Society of Steel Construction
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    • v.29 no.6
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    • pp.435-442
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    • 2017
  • A lateral load resisting system is a necessary structural element for the mid- to high-rise modular buildings and concrete cores are known as the most typical lateral load resisting systems in 10- to 20-story modular buildings. It is difficult to construct a concrete core simultaneously with the installation and finishing work of modular units because concrete placed using wet methods might contaminate or destroy the modular unit. Therefore, we have developed a hybrid PC (precast concrete) panel construction method that can construct a concrete core together with the installation of modular units. The hybrid PC panel is a load-bearing element in which a pair of C-shaped beams are combined at the top and bottom of a concrete wall. Concrete cores can be constructed by dry method to connect the hybrid PC panels with bolts. In this study, the details and connection of hybrid PC panels are improved to have the lateral performance comparable to reinforced concrete structural walls and are verified through FE analysis.

Parallel Processing of k-Means Clustering Algorithm for Unsupervised Classification of Large Satellite Images: A Hybrid Method Using Multicores and a PC-Cluster (대용량 위성영상의 무감독 분류를 위한 k-Means Clustering 알고리즘의 병렬처리: 다중코어와 PC-Cluster를 이용한 Hybrid 방식)

  • Han, Soohee;Song, Jeong Heon
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.37 no.6
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    • pp.445-452
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    • 2019
  • In this study, parallel processing codes of k-means clustering algorithm were developed and implemented in a PC-cluster for unsupervised classification of large satellite images. We implemented intra-node code using multicores of CPU (Central Processing Unit) based on OpenMP (Open Multi-Processing), inter-nodes code using a PC-cluster based on message passing interface, and hybrid code using both. The PC-cluster consists of one master node and eight slave nodes, and each node is equipped with eight multicores. Two operating systems, Microsoft Windows and Canonical Ubuntu, were installed in the PC-cluster in turn and tested to compare parallel processing performance. Two multispectral satellite images were tested, which are a medium-capacity LANDSAT 8 OLI (Operational Land Imager) image and a high-capacity Sentinel 2A image. To evaluate the performance of parallel processing, speedup and efficiency were measured. Overall, the speedup was over N / 2 and the efficiency was over 0.5. From the comparison of the two operating systems, the Ubuntu system showed two to three times faster performance. To confirm that the results of the sequential and parallel processing coincide with the other, the center value of each band and the number of classified pixels were compared, and result images were examined by pixel to pixel comparison. It was found that care should be taken to avoid false sharing of OpenMP in intra-node implementation. To process large satellite images in a PC-cluster, code and hardware should be designed to reduce performance degradation caused by file I / O. Also, it was found that performance can differ depending on the operating system installed in a PC-cluster.

Per Core Task Scheduling Policy in Multicore Embedded Systems (멀티코어 임베디드 시스템의 코어별 스케줄링 정책 관리 기법)

  • Na, Gap-Joo;Jung, YungJoon
    • Proceedings of the Korea Information Processing Society Conference
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    • 2013.11a
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    • pp.457-460
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    • 2013
  • 서버 및 PC 시장에서의 멀티코어 프로세서의 강세는 임베디드 기기에도 이어지고 있으며 최근 이기종 멀티코어 프로세서를 탑재한 임베디드 제품들도 출시되고 있다. 태스크 스케줄러 관점에서 멀티코어 프로세서는 태스크들이 효과적으로 스케줄링 될 수 있도록 코어를 선택하고 태스크의 이주를 통해 다른 코어들과의 로드를 유지해야 한다. 그러나 현재 임베디드 기기의 태스크 스케줄러는 모든 코어에 동일한 정책을 적용함으로써 태스크의 특징에 따른 효과적인 자원관리를 못하고 있다. 본 논문에서는 코어별로 스케줄링 정책을 관리하는 기법을 적용함으로써 태스크의 특징에 따른 코어의 활용을 높일 수 있는 방안을 제시한다.

Computation-Communication Overlapping in AES-CCM Using Thread-Level Parallelism on a Multi-Core Processor (멀티코어 프로세서의 쓰레드-수준 병렬성을 활용한 AES-CCM 계산-통신 중첩화)

  • Lee, Eun-Ji;Lee, Sung-Ju;Chung, Yong-Wha;Lee, Myung-Ho;Min, Byoung-Ki
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.8
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    • pp.863-867
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    • 2010
  • Multi-core processors are becoming increasingly popular. As they are widely adopted in embedded systems as well as desktop PC's, many multimedia applications are being parallelized on multi-core platforms. However, it is difficult to parallelize applications with inherent data dependencies such as encryption algorithms for multimedia data. In order to overcome this limit, we propose a technique to overlap computation and communication using an otherwise idle core in this paper. In particular, we interpret the problem of multimedia computation and communication as a pipeline design problem at the application program level, and derive an optimal number of stages in the pipeline.

Sojourn Time Analysis Using SRPT Scheduling for Heterogeneous Multi-core Systems (Heterogeneous 멀티코어 시스템에서 SRPT 스케줄링을 사용한 체류 시간 분석)

  • Yang, Bomi;Park, Hyunjae;Choi, Young-June
    • Journal of KIISE
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    • v.44 no.3
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    • pp.223-231
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    • 2017
  • In this paper, we study the performance of recently popular multi-core systems in mobiles. Previous research on the multi-core performance usually focused on the desktop PC. However, there is enough scope to further analyze heterogeneous multi-core systems. Therefore, by extending homogeneous multi-core systems, we analyze the heterogeneous multi-core systems using Size Interval Task Allocation (SITA) for job allocation, and Shortest Remaining Processing Time (SRPT) scheduling, for each individual core. We propose a new computational method regarding the cutoff point, which is crucial in analyzing SITA, by calculating the sojourn time. This facilitate easy and accurate calculation of the sojourn time. We further confirm our analysis through the ESESC simulator that provides actual measurements.

Polyclass in Data Mining (데이터 마이닝에서의 폴리클라스)

  • 구자용;박헌진;최대우
    • The Korean Journal of Applied Statistics
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    • v.13 no.2
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    • pp.489-503
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    • 2000
  • Data mining means data analysis and model selection using various types of data in order to explore useful information and knowledge for making decisions. Examples of data mining include scoring for credit analysis of a new customer and scoring for churn management, where the customers with high scores are given special attention. In this paper, scoring is interpreted as a modeling process of the conditional probability and polyclass scoring method is described. German credit data, a PC communication company data and a mobile communication company data are used to compare the performance of polyclass scoring method with that of the scoring method based on a tree model.

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Implementation of a PC based Hardware Simulator with 128 channels (128채널 PC 기반 하드웨어 시뮬레이터 구현)

  • 정갑천;최종현;박성모
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.40 no.5
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    • pp.298-305
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    • 2003
  • This paper describes a 128-channel hardware simulator that is useful for verification and testing of digital circuits. It performs logic analyzer function and signal generator function at the same time. The core module, which implements one channel of the simulator, operates as a controller with independent memory and internal mode. Therefore, we can easily extend the number of channels with addition of core module. Moreover, since the simulator was implemented as a PC based system, one can construct a low-cost system and can configure convenient GUI(Graphic User Interface) environment. The simulator implemented using FPGA operates at 50Mhz and consumes 55W power as average.

A Study on the Scalability of Multi-core-PC Cluster for Seismic Design of Reinforced-Concrete Structures based on Genetic Algorithm (유전알고리즘 기반 콘크리트 구조물의 최적화 설계를 위한 멀티코어 퍼스널 컴퓨터 클러스터의 확장 가능성 연구)

  • Park, Keunhyoung;Choi, Se Woon;Kim, Yousok;Park, Hyo Seon
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.26 no.4
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    • pp.275-281
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    • 2013
  • In this paper, determination of the scalability of the cluster composed common personal computer was performed when optimization of reinforced concrete structure using genetic algorithm. The goal of this research is watching the potential of multi-core-PC cluster for optimization of seismic design of reinforced-concrete structures. By increasing the number of core-processer of cluster, decreasing of computation time per each generation of genetic algorithm was observed. After classifying the components in singular personal computer, the estimation of the expected bottle-neck phenomenon and comparison with wall-clock time and Amdahl's law equation was performed. So we could obseved the scalability of the cluster appear complex tendency. For separating the bottle-neck phenomenon of physical and algorithm, the different size of population was selected for genetic algorithm cases. When using 64 core-processor, the efficiency of cluster is low as 31.2% compared with Amdahl's law efficiency.