• Title/Summary/Keyword: P2P 통신

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Analysis of water quality smart meter data using dynamic time warping (Dynamic Time Warping을 이용한 수질 스마트미터 데이터 분석)

  • Lim, Soyeon;Jung, Donghwi
    • Proceedings of the Korea Water Resources Association Conference
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    • 2021.06a
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    • pp.173-173
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    • 2021
  • 현재까지 상수도관망 내 수질적 거동에 대한 분석은 (1) 네트워크 수질 모델(EPANET 수질모의 등)에 기반한 방법과 (2) 시공간적 저해상도 데이터에 기반한 데이터 분석법이 주를 이루었다. 그러나 현존 네트워크 수질 모델은 수질 사고의 복잡한 물리·화학적 거동을 상세히 모의하기 어렵다. 반면 계측 및 통신기술의 발달로 고해상도 수질 데이터의 실시간 수집이 가능해지면서 사고의 사전감지, 발생시 즉각적 탐지 및 대응을 위한 데이터 분석법에 관심이 증가하고 있다. 서울 문래동, 인천, 포항의 경우에서도 알 수 있듯이, 수질사고 발생 시 원인물질의 시공간적 이송 또는 전파에 대한 정보는 사고대응에 유용하게 활용된다. 본 연구는, 비정상적인 수질변화의 계통 내 전달 시간을 계산하기 위해 고해상도 수질 스마트 미터 데이터에 기반한 데이터 분석법을 개발하였다. 물공급 하류방향의 수질변화 전달 시간 정량화를 위해 화음탐색법 기반 동적시간워핑(Dynamic time warping; DTW) 기술을 이용하였고, 원데이터의 전처리를 위해 이동평균필터링을 수행하였다. 개발된 분석법은 A시 생산 및 배·급수과정의 감시지점에서 10초 단위로 계측된 다양한 수질변수(pH, 탁도, 잔류염소, 전기전도도, 수온 등)의 공간적 변이 전파시간을 결정하기 위해 적용되었다. 분석에 활용한 데이터는 데이터 통신 및 측정 기기에 의한 이상값과 운영상황의 변화에 따라 변동한 값을 처리하기 이전의 데이터이다. 데이터 품질에 의한 영향을 배제하기 위해 이상값이 발생하지 않은 기간을 파악한 후, 그 기간에 대하여 분석하였다. 계통 내 위계에 따라 두 지점의 측정값의 전파시간을 정량화한 결과, 지점에 따라 전파시간이 다르게 나타났다. 또한, 같은 두 지점에 적용한 결과라도 DTW를 적용하는 기간과 이동평균필터링의 크기에 따라 수질변화 전달 시간이 다르게 나타나는 것을 확인할 수 있었다. 본 연구에서 개발된 분석법은 다변량 수질변수 간의 영향관계를 파악하는데 확장 적용이 가능하다. 또한, 이 방법의 실시간 적용을 통해 동적으로 변화하는 전달시간을 주기적, 공간적으로 갱신하여 관망 수질 변화 모니터링이 가능하다.

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Stacked LTCC Band-Pass Filter for IEEE 802.11a (IEEE 802.11a용 적층형 LTCC 대역통과 여파기)

  • Lee Yun-Bok;Kim Ho-Yong;Lee Hong-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.2 s.93
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    • pp.154-160
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    • 2005
  • Microwave Otters are essential device in modem wireless systems. A compact dimension BPF(Band-pass Filter) for IEEE 802.11a WLAN service is realized using LTCC multi-layer process. To extrude 2-stage band-pass equivalent circuit, band-pass and J-inverter transform applied to Chebyshev low-pass prototype filter. Because parallel L-C resonator is complicate and hard to control the inductor characteristics in high frequency, the shorted $\lambda/4$ stripline is selected for the resonator structure. The passive element is located in the different layers connected by conventional via structure and isolated by inner GND. The dimension of fabricated stacked band-pass filter which is composed of six layers, is $2.51\times2.27\times1.02\;mm^3$. The measured filter characteristics show the insertion loss of -2.25 dB, half-power bandwidth of 220 MHz, attenuation at 5.7 GHz of -32.25 dB and group delay of 0.9 ns at 5.25 GHz.

Analysis of Spatial and Vertical Variability of Environmental Parameters in a Greenhouse and Comparison of Carbon Dioxide Concentration in Two Different Types of Greenhouses (온실 환경요인의 공간적 및 수직적 특성 분석과 온실 종류에 따른 이산화탄소 농도 비교)

  • Jeong, Young Ae;Jang, Dong Cheol;Kwon, Jin Kyung;Kim, Dae Hyun;Choi, Eun Young
    • Journal of Bio-Environment Control
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    • v.31 no.3
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    • pp.221-229
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    • 2022
  • This study was aimed to investigate spatial and vertical characteristics of greenhouse environments according to the location of the environmental sensors, and to investigate the correlations between temperature, light intensity, and carbon dioxide (CO2) concentration according to the type of greenhouse. Temperature, relative humidity (RH), CO2, and light sensors were installed in the four-different vertical positions of the whole canopy as well as ground and roof space at the five spatial locations of the Venlo greenhouse. Also, correlations between temperature, light intensity, and CO2 concentration in Venlo and semi-closed greenhouses were analyzed using the Curve Expert Professional program. The deviations among the spatial locations were larger in the CO2 concentration than other environmental factors in the Venlo greenhouse. The average CO2 concentration ranged from 465 to 761 µmol·mol-1 with the highest value (646 µmol·mol-1) at the Middle End (4ME) close to the main pipe (50Ø) of the liquefied CO2 gas supply and lowest (436 µmol·mol-1) at the Left Middle (5LM). The deviation among the vertical positions was greater in temperature and relative humidity than other environments. The time zone with the largest deviation in average temperature was 2 p.m. with the highest temperature (26.51℃) at the Upper Air (UA) and the lowest temperature (25.62℃) at the Lower Canopy (LC). The time zone with the largest deviation in average RH was 1 p.m. with the highest RH (76.90%) at the LC and the lowest RH (71.74%) at the UA. The highest average CO2 concentration at each hour was Roof Air (RF) and Ground (GD). The coefficient of correlations between temperature, light intensity, and CO2 concentration were 0.07 for semi-closed greenhouse and 0.66 for Venlo greenhouse. All the results indicate that while the CO2 concentration in the greenhouse needs to be analyzed in the spatial locations, temperature and humidity needs to be analyzed in the vertical positions of canopy. The target CO2 fertilization concentration for the semi-closed greenhouse with low ventilation rate should be different from that of general greenhouses.

A 45GHz $f_{T}\;and\;50GHz\;f_{max}$ SiGe BiCMOS Technology Development for Wireless Communication ICs (무선통신소자제작을 위한 45GHz $f_{T}$ 및 50GHZz $f_{max}$ SiGe BiCMOS 개발)

  • Hwang Seok-Hee;Cho Dae-Hyung;Park Kang-Wook;Yi Sang-Don;Kim Nam-Ju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.1-8
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    • 2005
  • A $0.35\mu$m SiGe BiCMOS fabrication process has been timely developed, which is aiming at wireless RF ICs development and fast growing SiGe RF market. With non-selective SiGe epilayer, SiGe HBTs in this process used trapezoidal Ge base profile for the enhanced AC performance via Ge induced bandgap niuoin. The characteristics of hFE 100, $f_{T}\;45GHz,\;F_{max}\;50GHz,\;NF_{min}\;0.8dB$ have been obtained by optimizing not only SiGe base profile but also RTA condition after emitter polysilicon deposition, which enables the SiGe technology competition against the worldwide cutting edge SiGe BiCMOS technology. In addition, the process incorporates the CMOS logic, which is fully compatible with $0.35\mu$m pure logic technology. High Q passive elements are also provided for high precision analog circuit designs, and their quality factors of W(1pF) and inductor(2nH) are 80, 12.5, respectively.

A Study on Mid-amble based V2X Channel Estimation Techniques Using Bidirectional Averaging (양방향 평균화를 이용한 새로운 Mid-amble 기반 V2X 채널추정 기법에 관한 연구)

  • Kim, Ju-Hyeok;Song, Changick
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.287-291
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    • 2022
  • In general, as the amplitude and phase information of the physical layer channel impulse response change rapidly in time and frequency according to the high-speed movement of the vehicles in V2X communication systems, it is difficult to accurately estimate these channels at the receiving end. In order to effectively overcome this problem, midamble-based channel estimation methods in which mid-ambles are periodically inserted into a packet have been recently considered. However, as the number of midambles increases, we suffer from the spectral efficiency loss. To relieve such a loss, in this paper, we propose a new bidirectional averaging channel estimation method that combines the existing data pilot-based channel estimation methods and the mid-ambles. Finally, through the simulation results, we demonstrate that the proposed method outperforms the existing mid-amble method in terms of packet error rate with fewer number of mid-ambles.

Design and Implementation of Network-Adaptive High Definition MPEG-2 Streaming employing frame-based Prioritized Packetization (프레임 기반의 우선순위화를 적용한 네트워크 적응형 HD MPEG-2 스트리밍의 설계 및 구현)

  • Park SangHoon;Lee Sensjoo;Kim JongWon;Kim WooSuk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.10A
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    • pp.886-895
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    • 2005
  • As the networked media technology have been grown in recent, there have been many research works to deliver high-quality video such as HDV and HDTV over the Internet. To realize high-quality media service over the Internet, however, the network adaptive streaming scheme is required to adopt to the dynamic fluctuation of underlying networks. In this paper, we design and implement the network-adaptive HD(high definition) MPEG-2 streaming system employing the frame-based prioritized packetization. Delivered video is inputted from the JVC HDV camera to the streaming sewer in real-time. It has a bit-rate of 19.2 Mbps and is multiplexed to the MPEG-2 TS (MPEG-2 MP@HL). For the monitoring of network status, the packet loss rate and the average jitter are measured by using parsing of RTP packet header in the streaming client and they are sent to the streaming server periodically The network adaptation manager in the streaming server estimates the current network status from feedback packets and adaptively adjusts the sending rate by frame dropping. For this, we propose the real-time parsing and the frame-based prioritized packetization of the TS packet. The proposed system is implemented in software and evaluated over the LAN testbed. The experimental results show that the proposed system can enhance the end-to-end QoS of HD video streaming over the best-effort network.

Gate length scaling behavior and improved frequency characteristics of In0.8Ga0.2As high-electron-mobility transistor, a core device for sensor and communication applications (센서 및 통신 응용 핵심 소재 In0.8Ga0.2As HEMT 소자의 게이트 길이 스케일링 및 주파수 특성 개선 연구)

  • Jo, Hyeon-Bhin;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.30 no.6
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    • pp.436-440
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    • 2021
  • The impact of the gate length (Lg) on the DC and high-frequency characteristics of indium-rich In0.8Ga0.2As channel high-electron mobility transistors (HEMTs) on a 3-inch InP substrate was inverstigated. HEMTs with a source-to-drain spacing (LSD) of 0.8 ㎛ with different values of Lg ranging from 1 ㎛ to 19 nm were fabricated, and their DC and RF responses were measured and analyzed in detail. In addition, a T-shaped gate with a gate stem height as high as 200 nm was utilized to minimize the parasitic gate capacitance during device fabrication. The threshold voltage (VT) roll-off behavior against Lg was observed clearly, and the maximum transconductance (gm_max) improved as Lg scaled down to 19 nm. In particular, the device with an Lg of 19 nm with an LSD of 0.8 mm exhibited an excellent combination of DC and RF characteristics, such as a gm_max of 2.5 mS/㎛, On resistance (RON) of 261 Ω·㎛, current-gain cutoff frequency (fT) of 738 GHz, and maximum oscillation frequency (fmax) of 492 GHz. The results indicate that the reduction of Lg to 19 nm improves the DC and RF characteristics of InGaAs HEMTs, and a possible increase in the parasitic capacitance component, associated with T-shap, remains negligible in the device architecture.

Design of Low Power 12Bit 80MHz CMOS D/A Converter using Pseudo-Segmentation Method (슈도-세그멘테이션 기법을 이용한 저 전력 12비트 80MHz CMOS D/A 변환기 설계)

  • Joo, Chan-Yang;Kim, Soo-Jae;Lee, Sang-Min;Kang, Jin-Ku;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.13-20
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    • 2008
  • This paper describes the design of low power 12bit Digital-to-Analog Converter(D/A Converter) using Pseudo-Segmentation method which shows the conversion rate of 80MHz and the power supply of 1.8V with 0.18um CMOS n-well 1-poly 6-metal process for advanced wireless communication system. Pseudo-segmentation method used in binary decoder consists of simple parallel buffer is employed for low power because of simpler configuration than that of thermometer decoder. Also, using deglitch circuit and swing reduced drivel reduces a switching noise. The measurement results of the proposed low power 12bit 80MHz CMOS D/A Converter shows SFDR is 66.01dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB is 10.67bit. Integral nonlinearity(INL) / Differential nonlinearity(DNL) have been measured ${\pm}1.6LSB/{\pm}1.2LSB$. Glich energy is measured $49pV{\cdot}s$. Power dissipation is 46.8mW at 80MHz(Maximum sampling frequency) at a 1.8V power supply.

I/Q channel 12-Bit 120MHz CMOS D/A Converter for WLAN (무선랜용 I/Q 채널 12bit 120MHz CMOS D/A 변환기 설계)

  • Ha, Sung-Min;Nam, Tae-Kyu;Seo, Sung-Uk;Shin, Sun-Hwa;Joo, Chan-Yang;Yoon, Kwang-S.
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.11 s.353
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    • pp.83-89
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    • 2006
  • This paper describes the design of I/Q channel 12bit Digital-to-Analog Converter(DAC) which shows the conversion rate of 120MHz and the power supply of 3.3V with 0.35um CMOS n-well 1-poly 4-metal process for advanced wireless transceiver. The proposed DAC utilizes 4-bit thermometer decoder with 3 stages for minimum glitch energy and linearity error. Also, using a optimized 4bit thermometer decoder for the decrement of the chip area. Integral nonlinearity(INL) of ${\pm}1.6LSB$ and differential nonlinearity(DNL) of ${\pm}1.3LSB$ have been measured. In single tone test, the ENOB of the proposed 12bit DAC is 10.5bit and SFDR of 73dB(@ Fs=120MHz, Fin=1MHz) is measured, respectively. Dual-tone test SFDR is 61 dB (@ Fs=100MHz, Fin=1.5MHz, 2MHz). Glitch energy of 31 pV.s is measured. The converter consumes a total of 105mW from 3.3-V power supply.

An FPGA Implementation of the Synthesis Filter for MPEG-1 Audio Layer III by a Distributed Arithmetic Lookup Table (분산산술연산방식을 이용한 MPEG-1 오디오 계층 3 합성필터의 FPGA 군현)

  • Koh Sung-Shik;Choi Hyun-Yong;Kim Jong-Bin;Ku Dae-Sung
    • The Journal of the Acoustical Society of Korea
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    • v.23 no.8
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    • pp.554-561
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    • 2004
  • As the technologies of semiconductor and multimedia communication have been improved. the high-quality video and the multi-channel audio have been highlighted. MPEG Audio Layer 3 decoder has been implemented as a Processor using a standard. Since the synthesis filter of MPEG-1 Audio Layer 3 decoder requires the most outstanding operation in the entire decoder. the synthesis filter that can reduce the amount of operation is needed for the design of the high-speed processor. Therefore, in this paper, the synthesis filter. the most important part of MPEG Audio, is materialized in FPGA using the method of DAULT (distributed arithemetic look-up table). For the design of high-speed synthesis filter, the DAULT method is used instead of a multiplier and a Pipeline structure is used. The Performance improvement by 30% is obtained by additionally making the result of multiplication of data with cosine function into the table. All hardware design of this Paper are described using VHDL (VHIC Hardware Description Language) Active-HDL 6.1 of ALDEC is used for VHDL simulation and Synplify Pro 7.2V is used for Model-sim and synthesis. The corresponding library is materialized by XC4013E and XC4020EX. XC4052XL of XILINX and XACT M1.4 is used for P&R tool. The materialized processor operates from 20MHz to 70MHz.