• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.295-295
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• 2016

Recently, TCO films with low carrier concentration, high mobility and high work function are proposed beneficial as front electrode in HIT solar cell due to free-carrier absorption in NIR wavelength region and low Schottky barrier height in the front TCO/a-Si:H(p) interface. We report high transmittance and work function zirconium-doped indium tin oxide (ITO:Zr) films with various plasma (Ar/O2 and Ar) conditions. The role of (Ar/O2) plasma was to enhance the work function of the ITO:Zr films whereas the pure Ar plasma based ITO:Zr showed good electrical properties. The RF magnetron sputtered ITO:Zr films with low resistivity and high transmittance were employed as front electrode in HIT solar cells, yield the best performance of 18.15% with an open-circuit voltage of 710 eV and current density of 34.63 mA/cm2. The high work function ITO:Zr films can be used to modify the front barrier height of HIT solar cell.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.10
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• pp.767-770
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• 2010

In this work, we investigated the static characteristics of 4H-SiC vertical metal-oxidesemiconductor field effect transistors (VMOSFETs) by adjusting the doping level of n-epilayer and the effect of a current spreading layer (CSL), which was inserted below the p-base region with highly doped n+ state ($5{\times}10^{17}cm^{-3}$). The structure of SiC VMOSFET was designed by using a 2-dimensional device simulator (ATLAS, Silvaco Inc.). By varying the n-epilayer doping concentration from $1{\times}10^{16}cm^{-3}$ to $1{\times}10^{17}cm^{-3}$, we investigated the static characteristics of SiC VMOSFETs such as blocking voltages and on-resistances. We found that CSL helps distribute the electron flow more uniformly, minimizing current crowding at the top of the drift region and reducing the drift layer resistance. For that reason, silicon carbide VMOSFET structures of highly intensified blocking voltages with good figures of merit can be achieved by adjusting CSL and doping level of n-epilayer.

• Korean Journal of Materials Research
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• v.13 no.6
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• pp.398-403
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• 2003

Shallow $p^{＋}$ n junction was formed using a ULE(ultra low energy) implanter. Deactivation phenomena were investigated for the shallow source/drain junction based on measurements of post-annealing time and temperature following the rapid thermal annealing(RTA) treatments. We found that deactivation kinetics has two regimes such that the amount of deactivation increases exponentially with annealing temperature up to $850^{\circ}C$ and that it decreases linearly with the annealing temperature beyond that temperature. We believe that the first regime is kinetically limited while the second one is thermodynamically limited. We also observed "transient enhanced deactivation", an anomalous increase in sheet resistance during the early stage of annealing at temperatures higher than X$/^{\circ}C$. Activation energy for transient enhanced deactivation was measured to be 1.75-1.87 eV range, while that for normal deactivation was found to be between 3.49-3.69 eV.

• Korean Journal of Materials Research
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• v.23 no.1
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• pp.35-40
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• 2013

In this study, the influence on the surface passivation properties of crystalline silicon according to silicon wafer thickness, and the correlation with a-Si:H/c-Si heterojunction solar cell performances were investigated. The wafers passivated by p(n)-doped a-Si:H layers show poor passivation properties because of the doping elements, such as boron(B) and phosphorous(P), which result in a low minority carrier lifetime (MCLT). A decrease in open circuit voltage ($V_{oc}$) was observed when the wafer thickness was thinned from $170{\mu}m$ to $50{\mu}m$. On the other hand, wafers incorporating intrinsic (i) a-Si:H as a passivation layer showed high quality passivation of a-Si:H/c-Si. The implied $V_{oc}$ of the ITO/p a-Si:H/i a-Si:H/n c-Si wafer/i a-Si:H/n a-Si:H/ITO stacked layers was 0.715 V for $50{\mu}m$ c-Si substrate, and 0.704 V for $170{\mu}m$ c-Si. The $V_{oc}$ in the heterojunction solar cells increased with decreases in the substrate thickness. The high quality passivation property on the c-Si led to an increasing of $V_{oc}$ in the thinner wafer. Short circuit current decreased as the substrate became thinner because of the low optical absorption for long wavelength light. In this paper, we show that high quality passivation of c-Si plays a role in heterojunction solar cells and is important in the development of thinner wafer technology.

• New & Renewable Energy
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• v.9 no.2
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• pp.23-29
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• 2013

Furnace and laser is currently the most important doping process. However furnace is typically difficult appling for selective emitters. Laser requires an expensive equipment and induces a structural damage due to high temperature using laser. This study has developed a new atmospheric pressure plasma source and research atmospheric pressure plasma doping. Atmospheric pressure plasma source injected Ar gas is applied a low frequency (a few 10 kHz) and discharged the plasma. We used P type silicon wafers of solar cell. We set the doping parameter that plasma treatment time was 6s and 30s, and the current of making the plasma is 70 mA and 120 mA. As result of experiment, prolonged plasma process time and highly plasma current occur deeper doping depth and improve sheet resistance. We investigated doping profile of phosphorus paste by SIMS (Secondary Ion Mass Spectroscopy) and obtained the sheet resistance using generally formula. Additionally, grasped the wafer surface image with SEM (Scanning Electron Microscopy) to investigate surface damage of doped wafer. Therefore we confirm the possibility making the selective emitter of solar cell applied atmospheric pressure plasma doping with phosphorus paste.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.61-67
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• 2006

We fabricate local damascene FinFET cell array in sub-60nm feature sized DRAM. The local damascene structure can remove passing-gate-effects in FinFET cell array. p+ boron in-situ doped polysilicon is chosen for the gate material, and we obtain a uniform distribution of threshold voltages at around 0.7V. Sub-threshold swing of 75mV/d and extrapolated off-state leakage current of 0.03fA are obtained, which are much suppressed values against those of recessed channel array transistors. We also obtain a few times higher on-state current. Based on the improved on- and off-state current characteristics, we expect that the FinFET cell array could be a new mainstream structure in sub-60nm DRAM devices, satisfying high density, low power, and high-speed device requirements.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.477-480
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• 2002

Si-O-C(-H) thin film with a tow dielectric constant were deposited on a P-type Si(100) substrate by an inductively coupled plasma chemical vapor deposition (ICPCVD). Bis-trimethylsilymethane (BTMSM, H$_{9}$C$_3$-Si-CH$_2$-Si-C$_3$H$_{9}$) and oxygen gas were used as Precursor. Hybrid type Si-O-C(-H) thin films with organic material have been generated many voids after annealing. Consequently, the Si-O-C(-H) films can be made a low dielectric material by the effect of void. The surface characterization of Si-O-C(-H) thin films were performed by SEM(scanning electron microscope). The characteristic analysis of Si-O-C(-H) thin films were performed by X-ray photoelectron spectroscopy (XPS).

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.10a
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• pp.16.2-16.2
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• 2011

Graphene has attracted significant attention due to its unique characteristics and promising nanoelectronic device applications. For practical device applications, it is essential to synthesize high-quality and large-area graphene films. Graphene has been synthesized by eloborated mechanical exfoliation of highly oriented pyrolytic graphite, chemical reduction of exfoliated grahene oxide, thermal decomposition of silicon carbide, and chemical vapor deposition (CVD) on metal substrates such as Ni, Cu, Ru etc. The CVD has advantages over some of other methods in terms of mass production on large-areas substrates and it can be easily separated from the metal substrate and transferred to other desired substrates. Especially, plasma-enhanced CVD (PECVD) can be very efficient to synthesize high-quality graphene. Little information is available on the synthesis of graphene by PECVD even though PECVD has been demonstrated to be successful in synthesizing various carbon nanostructures such as carbon nanotubes and nanosheets. In this study, we synthesized graphene on $Ni/SiO_2/Si$ and Cu plate substrates with CH4 diluted in $Ar/H_2$ (10%) by using an inductively-coupled PECVD (ICPCVD). High-quality graphene was synthesized at as low as $700^{\circ}C$ with 600 W of plasma power while graphene layer was not formed without plasma. The growth rate of graphene was so fast that graphene films fully covered on substrate surface just for few seconds $CH_4$ gas supply. The transferred graphene films on glass substrates has a transmittance at 550 nm is higher 94%, indicating 1~3 monolayers of graphene were formed. FETs based on the grapheme films transferred to $Si/SiO_2$ substrates revealed a p-type. We will further discuss the synthesis of graphene and doped graphene by ICPVCD and their characteristics.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.6
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• pp.95-99
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• 2013

Furnace is currently the most important doping process using POCl3 in solar cell. However furnace need an expensive equipment cost and it has to purge a poisonous gas. Moreover, furnace typically difficult appling for selective emitters. In this study, we developed a new atmospheric pressure plasma source, in this procedure, we research the atmospheric pressure plasma doping that dopant is phosphoric acid($H_3PO_4$). Metal tube injected Ar gas was inputted 5 kV of a low frequency(scores of kHz) induced inverter, so plasma discharged at metal tube. We used the P type silicon wafer of solar cell. We regulated phosphoric acid($H_3PO_4$) concentration on 10% and plasma treatment time is 90 s, 150 s, we experiment that plasma current is 70 mA. We check the doping depth that 287 nm at 90 s and 621 nm at 150 s. We analysis and measurement the doping profile by using SIMS(Secondary Ion Mass Spectroscopy). We calculate and grasp the sheet resistance using conventional sheet resistance formula, so there are 240 Ohm/sq at 90 s and 212 Ohm/sq at 150 s. We analysis oxygen and nitrogen profile of concentration compared with furnace to check the doped defect of atmosphere.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.388-388
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• 2010

In this study, Ferroelectric vinylidene fluoride-trifluoroethylene (VF2-TrFE) copolymer films were directly deposited on degenerated Si (n+, $0.002\;{\Omega}{\cdot}cm$) using by spin coating method. A 1~5 wt% diluted solution of purified vinylidene fluoride-trifluoroethylene (VF2:TrFE = 70:30) in a dimethylformamide (DMF) solvent were prepared and deposited on silicon wafers at a spin rate of 2000 ~ 4000 rpm for 2 ~ 30 seconds. After annealing in a vacuum ambient at 100 ~ $200^{\circ}C$ for 60 min, upper aluminum electrodes were deposited by vacuum evaporation for electrical measurement. X-ray diffraction results showed that the VF2-TrFE films on Si substrates had $\beta$-phase of copolymer structures. The capacitance on highly doped Si wafer showed hysteresis behavior like a butterfly shape and this result indicates clearly that the copolymer films have ferroelectric properties. The typical measured remnant polarization ($P_r$) and coercive filed ($E_c$) values were about $5.7\;{\mu}C/cm^2$ and 710 kV/em, respectively, in an applied electric field of ${\pm}$ 1.5 MV/em. The gate leakage current densities measured at room temperature was less than $7{\times}10^{-7}\; A/cm^2$ under a field of 1 MV/cm.