• Title/Summary/Keyword: Oxide current

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High Performance Current Sensing Circuit for Current-Mode DC-DC Buck Converter

  • Jin, Hai-Feng;Piao, Hua-Lan;Cui, Zhi-Yuan;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.1
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    • pp.24-28
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    • 2010
  • A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.

The Characteristics of LLLC in Ultra Thin Silicon Oxides (실리콘 산화막에서 저레벨누설전류 특성)

  • Kang, C.S.
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.8
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    • pp.285-291
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    • 2013
  • In this paper, MOS-Capacitor and MOSFET devices with a Low Level Leakage Current of oxide thickness, channel width and length respectively were to investigate the reliability characterizations mechanism of ultra thin gate oxide films. These stress induced leakage current means leakage current caused by stress voltage. The low level leakage current in stress and transient current of thin silicon oxide films during and after low voltage has been studied from strss bias condition respectively. The stress channel currents through an oxide measured during application of constant gate voltage and the transient channel currents through the oxide measured after application of constant gate voltage. The study have been the determination of the physical processes taking place in the oxides during the low level leakage current in stress and transient current by stress bias and the use of the knowledge of the physical processes for driving operation reliability.

Supercapacitive Properties of Co-Ni Mixed Oxide Electrode Adopting the Nickel Foam as a Current Collector

  • Cho, Hyeon Woo;Nam, Ji Hyun;Park, Jeong Ho;Kim, Kwang Man;Ko, Jang Myoun
    • Bulletin of the Korean Chemical Society
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    • v.33 no.12
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    • pp.3993-3997
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    • 2012
  • Three-dimensional porous nickel foam was used as a current collector to prepare a Co-Ni oxide/Ni foam electrode for a supercapacitor. The synthesized Co-Ni oxide was proven to consist of mixed oxide phases of $Co_3O_4$ and NiO. The Co-Ni oxide/Ni foam electrode prepared was characterized by morphological observation, crystalline property analysis, cyclic voltammetry, and impedance spectroscopy. Cyclic voltammetry for the electrode showed high specific capacitances, such as 936 F $g^{-1}$ at 5 mV $s^{-1}$ and 566 F $g^{-1}$ at 200 mV $s^{-1}$, and a comparatively good cycle performance. These improved results were mainly due to the dimensional stability of the nickel foam and its high electrical contact between the electrode material and the current collector substrate.

DYNAMIC CHARGE CARRIER TRANSPORT BEHAVIORS IN ZIRCONIUM OXIDE FOR NUCLEAR CLADDING MATERIALS

  • IL-KYU PARK;SANG-SEOK LEE;YONG KYOON MOK;CHAN-WOO JEON;HYUN-GIL KIM
    • Archives of Metallurgy and Materials
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    • v.65 no.3
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    • pp.1063-1067
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    • 2020
  • Dynamic charge carrier transport behavior in the zirconium (Zr) oxide was investigated based on the frequency-dependent capacitance-voltage (C-V) and temperature-dependent current-voltage (I-V) measurements. The Zr oxide was formed on the ZIRLO and newly developed zirconium-based alloy (NDZ) by corrosion in the PWR-simulated loop at 360℃. The corrosion test for 90 days showed that the NDZ exhibits better corrosion resistance than ZIRLO alloy. Based on the C-V measurement, dielectric constant values for the Zr oxide was estimated to be 11.28 and 11.52 for the ZIRLO and NDZ. The capacitance difference between low and high frequency was larger in the ZIRLO than in the NDZ, which was attributed to more mobile electrical charge carriers in the oxide layer on the ZIRLO alloy. The current through the oxide layers on the ZIRLO increased more drastically with increasing temperature than on the NDZ, which indicating that more charge trap sites exist in the ZIRLO than in NDZ. Based on the dynamic charge carrier transport behavior, it was concluded that the electrical charge carrier transport within the oxide layers was closely related with the corrosion behavior of the Zr alloys.

Analysis of Tunneling Current of Asymmetric Double Gate MOSFET for Ratio of Top and Bottom Gate Oxide Film Thickness (비대칭 DGMOSFET의 상하단 산화막 두께비에 따른 터널링 전류 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.5
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    • pp.992-997
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    • 2016
  • This paper analyzes the deviation of tunneling current for the ratio of top and bottom gate oxide thickness of short channel asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current significantly increases if channel length reduces to 5 nm. This short channel effect occurs for asymmetric DGMOSFET having different top and bottom gate oxide structure. The ratio of tunneling current in off current with parameters of channel length and thickness, doping concentration, and top/bottom gate voltages is calculated in this study, and the influence of tunneling current to occur in short channel is investigated. The analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for the ratio of top and bottom gate oxide thickness in short channel asymmetric DGMOSFET, specially according to channel length, channel thickness, doping concentration, and top/bottom gate voltages.

Stress Induced Leakage Currents in the Silicon Oxide Insulator with the Nano Structures (나노 구조에서 실리콘 산화 절연막의 스트레스 유기 누설전류)

  • 강창수
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.335-340
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    • 2002
  • In this paper, the stress induced leakage currents of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between 113.4${\AA}$ and 814${\AA}$, which have the gate area $10^3cm^2$. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses.

SILC of Silicon Oxides

  • Kang, C.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.428-431
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    • 2003
  • In this paper, the stress induced leakage currents of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $113.4{\AA}$ and $814{\AA}$, which have the gate area 10-3cm2. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses.

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Effects of anode and current collector materials on the power density of solid oxide electrolyte direct carbon fuel cell (고체산화물 전해질 직접탄소 연료전지의 전극 및 집전부 재질이 출력밀도에 미치는 영향)

  • Hwang, J.Y.;Yoon, J.E.;Kang, K.;Kim, J.H.;Lee, B.J.
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.392-394
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    • 2009
  • Direct Carbon Fuel Cells (DCFCs) generates electricity directly converting the chemical energy in coal. In the present study, effects of anode and current collector materials on the power density of DCFC are investigated experimentally. The adopted DCFC system is combined type of solid oxide fuel cells (SOFC) and molten carbonate fuel cells (MCFC) with the use of a liquid-molten salt anode and a solid oxide electrolyte, proposed by SRI. Power densities of 25 mm button cells with various combination of anode materials and current collector materials are measured.

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Output Characteristics of Carbon-nanotube Field-effect Transistor Dependent on Nanotube Diameter and Oxide Thickness (나노튜브 직경과 산화막 두께에 따른 탄소나노튜브 전계 효과 트랜지스터의 출력 특성)

  • Park, Jong-Myeon;Hong, Shin-Nam
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.2
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    • pp.87-91
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    • 2013
  • Carbon-nanotube field-effect transistors (CNFETs) have drawn wide attention as one of the potential substitutes for metal-oxide-semiconductor field-effect transistors (MOSFETs) in the sub-10-nm era. Output characteristics of coaxially gated CNFETs were simulated using FETToy simulator to reveal the dependence of drain current on the nanotube diameter and gate oxide thickness. Nanotube diameter and gate oxide thickness employed in the simulation were 1.5, 3, and 6 nm. Simulation results show that drain current becomes large as the diameter of nanotube increases or insulator thickness decreases, and nanotube diameter affects the drain current more than the insulator thickness. An equation relating drain saturation current with nanotube diameter and insulator thickness is also proposed.

Fabrication of tungsten carbide by pulsed electric current heating (펄스통전가열에 의한 텅스텐 탄화물의 제조)

  • Hong, Seong-Hyeon;Kim, Hyun-Jin
    • Particle and aerosol research
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    • v.5 no.4
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    • pp.153-158
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    • 2009
  • Tungsten carbide powder was fabricated with carbothermal reaction by pulsed electric current flowing in compact of tunsten oxide and carbon. The mixed powder of tunsten oxide and carbon was ball-milled into ultrafine powders. The mixed powder of tungsten oxide and carbon was put into carbon mold and heat-treated at $1050{\sim}1200^{\circ}C$ by pulsed electric current flowing. The formation of tungsten carbide powder could be achieved by heat treatment at $1200^{\circ}C$ for 10 minitues.

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