• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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• pp.148-150
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• 2005

Indium tin oxide (ITO) thin film was polished by chemical mechanical polishing (CMP) immediately after pad conditioning with the various conditioning temperatures by control of de-ionized water (DIW). Light transparent efficiency of ITO thin film was improved after CMP process after pad conditioning at the high temperature because the surface morphology was smoother by soften polishing pad and decreased particle size.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.352-353
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• 2005

Indium tin oxide (ITO) thin film was polished by chemical mechanical polishing (CMP) immediately after pad conditioning with the various conditioning temperatures by control of do-ionized water (DIW). Light transparent efficiency of ITO thin film was improved after CMP process after pad conditioning at the high temperature because the surface morphology was smoother by soften polishing pad and decreased particle size.

• KSTLE International Journal
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• 제5권1호
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• pp.32-35
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• 2004

The purpose of this study is to investigate the effects of the structure and mechanical properties of laser-processed pads on their polishing behavior such as their removal rate and WIWNU (within wafer non-uniformity) during the chemical mechanical planarization (CMP) process. The holes on the pad acted as the reservoir of slurry particles and enhanced the removal rate. Without grooves, no effective removal of wafers was possible. When the length of the circular-type grooves was increased, higher removal rates and lower wafer non-uniformity were measured. The removal rate and non-uniformity linearly increased as the elastic modulus of the top pad increased. Higher removal rates and lower non-uniformity were measured as the hardness of the pad increased.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1357-1358
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• 2006

Indium tin oxide (ITO) thin film is a transparent electrode, which is widely applied to solar battery, illuminators, optical switches, liquid crystal displays (LCDs), plasma display panels (PDPs), and organic light emitting displays (OLEDs) due to its easy formation on glass substrates, goof optical transmittance, and good conductivity. ITO thin film is generally fabricated by various methods such as spray, CVD, evaporation, electron gun deposition, direct current electroplating, high frequency sputtering, and reactive DC sputtering. However, some problems such as peaks, bumps, large particles, and pin-holes on the surface of ITO thin film were reported, which caused the destruction of color quality, the reduction of device life time, and short-circuit. Chemical mechanical polishing (CMP) processis one of the suitable solutions which could solve the problems.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.236-236
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• 2008

(Bi,La)$Ti_3O_{12}$(BLT) thin film is one of the most attractive materials for ferroelectric random access memory (FRAM) applications due to its some excellent properties such as high fatigue endurance, low processing temperature, and large remanent polarization [1-2]. The authors firstly investigated and reported the damascene process of chemical mechanical polishing (CMP) for BLT thin film capacitor on behalf of plasma etching process for fabrication of FRAM [3]. CMP process could prepare the BLT capacitors with the superior process efficiency to the plasma etching process without the well-known problems such as plasma damages and sloped sidewall, which was enough to apply to the fabrication of FRAM [2]. BLT-CMP characteristics showed the typical oxide-CMP characteristics which were related in both pressure and velocity according to Preston's equation and Hernandez's power law [2-4]. Good surface roughness was also obtained for the densification of multilevel memory structure by CMP process [3]. The well prepared BLT capacitors fabricated by CMP process should have the sufficient ferroelectric properties for FRAM; therefore, in this study the electrical properties of the BLT capacitor fabricated by CMP process were analyzed with the process parameters. Especially, the effects of CMP pressure, which had mainly affected the removal rate of BLT thin films [2], on the electrical properties were investigated. In order to check the influences of the pressure in eMP process on the ferroelectric properties of BLT thin films, the electrical test of the BLT capacitors was performed. The polarization-voltage (P-V) characteristics show a decreased the remanent polarization (Pr) value when CMP process was performed with the high pressure. The shape of the hysteresis loop is close to typical loop of BLT thin films in case of the specimen after CMP process with the pressures of 4.9 kPa; however, the shape of the hysteresis loop is not saturated due to high leakage current caused by structural and/or chemical damages in case of the specimen after CMP process with the pressures of 29.4 kPa. The leakage current density obtained with positive bias is one order lower than that with negative bias in case of 29.4 kPa, which was one or two order higher than in case of 4.9 kPa. The high pressure condition was not suitable for the damascene process of BLT thin films due to the defects in electrical properties although the better efficiency of process. by higher removal rate of BLT thin films was obtained with the high pressure of 29.4 kPa in the previous study [2].

• 마이크로전자및패키징학회지
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• 제19권1호
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• pp.39-45
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• 2012

Cu-Cu 패턴의 직접접합 공정을 위하여 Buffered Oxide Etch(BOE) 및 Hydrofluoric acid(HF)의 습식 조건에 따른 Cu와 $SiO_2$의 식각 특성에 대한 평가를 수행하였다. 접촉식 3차원측정기(3D-Profiler)를 이용하여 Cu와 $SiO_2$의 단차 및 Chemical Mechanical Polishing(CMP)에 의한 Cu의 dishing된 정도를 분석 하였다. 실험 결과 BOE 및 HF 습식 식각 시간이 증가함에 따라 단차가 증가 하였고, BOE가 HF보다 더 식각 속도가 빠른 것을 확인하였다. BOE 및 HF 습식 식각 후 Cu의 dishing도 식각시간 증가에 따라 감소하였다. 식각 후 산화막 유무를 알아보기 위해 Cu표면을 X-선 광전자 분광법(X-ray Photoelectron Spectroscopy, XPS)를 이용하여 분석 한 결과 HF습식 식각 후 BOE습식 식각보다 Cu표면산화막이 상대적으로 더 얇아 진 것을 확인하였다.

• 한국전기전자재료학회논문지
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• 제23권5호
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• pp.358-363
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• 2010

The polishing pad is important element for polishing characteristic such as material removal rate(MRR) and within wafer non-uniformity(WIWNU) in the chemical mechanical planarization(CMP). The result of the viscoelasticity measurement shows that 1st elastic modulus is increased and 2nd elastic modulus is decreased when the top pad is thickened. The finite element analysis(FEA) was conducted to predict characteristic of polishing behavior according to the pad thickness. The result of polishing experiment was similar with the FEA, and it shows that the 1st elastic modulus affects instantaneous deformation of pad related to MRR. And the 2nd elastic modulus has an effect on WIWNU due to the viscoelasticity deformation of pad.

• 한국전기전자재료학회논문지
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• 제18권6호
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• pp.521-526
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• 2005

Within wafer non-uniformity(WIWNU) improves as the stiffness of pad decrease. We designed the pad groove to study of pad stiffness on WIWNU in Chemical mechanical polishing(CMP) and measured the pad stiffness according to groove width. The groove influences effective pad stiffness although original mechanical properties of pad are unchanged by grooving. Also, it affects the flow of slurry that has an effect on the lubrication regime and polishing results. An Increase of the apparent contact area of pad by groove width results in decrease of effective pad stiffness. WIWNU and profile of removal tate improved as effective pad stiffness decreased. Because grooving the pad reduce its effective stiffness and it makes slurry distribution to be uniform. Futhermore, it ensures that pad conforms to wafer-scale flatness variability. By grooving the top pad, it is possible to reduce its stiffness and hence reduce WIWNU and edge effect.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.239-242
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• 2004

We investigated the nanotopography impact on the post-chemical mechanical polishing (post-CMP) oxide thickness deviation(OTD) of ceria slurry with a surfactant. Not only the surfactant but also the slurry abrasive size influenced the nanotopography impact. The magnitude of the post-CMP OTD increased with adding the surfactant in the case of smaller abrasives, but it did not increase in the case of larger abrasives, while the magnitudes of the nanotopography heights are all similar. We created a one-dimensional numercal simulation of the nanotopography impact by taking account of the non-Prestonian behavior of the slurry, and good agreement with experiment results was obtained.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.525-526
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• 2007

Over-polishing is required to completely remove the material of top surface across whole wafer, in spite of a local dishing problem. This paper introduces the two-step CMP process using protective layer and high selectivity slurry, to reduce dishing amount and variation. The 30nm thick protective oxide layer was deposited on the pattern, and then polished with low selectivity slurry to partially remove the projected area while suppressing the removal rate of the recessed area. After the first step CMP process, high selectivity slurry was used to minimize the dishing amount and variation in pattern structure. Experimental result shows that two-step CMP process can be successfully applicable to reduce the dishing defect generated in over-polishing.