• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.3
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• pp.360-365
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• 2012

Cascaded H-Bridge rectifier (CHBR) is a more attractive solution in traction application for its transformerless structure. Because of the currents of different cells are exactly the same one, it is a challenge job to regulate the voltages of cells with only one current controller. In this paper, a PI-based control scheme is presented to deal with the voltages balance issue in CHBR. To satisfy the demand of rectifier such as unity power factor and regulated output DC voltages, the proposed control scheme consists of two parts. One is for shaping the grid current waveform and regulating the sum of DC-link voltages of all the cells; the other one is for balancing DC-link voltages. The latter is more concerned in this paper and is discussed in detail especially. Simulations and experiments are carried on. The results verified the feasibility and effectiveness of the proposed scheme.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.451-452
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• 2020

입력 전압과 출력 전압의 변환비가 큰 시스템에서는 전압 변환비가 큰 한 개의 컨버터 설계하기보다는 다수의 컨버터를 직렬 혹은 병렬로 구성하여 용량을 증가시키는 것이 유리하며, 모듈형으로 컨버터를 제작하여 연결할 경우, 다양한 용량의 컨버터를 구현할 수 있다. 입력 전압이 출력 전압보다 큰 시스템에서는 ISOP(Input Series-Output Parallel) 방식을 사용한다. 시스템을 ISOP로 시스템을 구성할 경우 직렬로 연결된 모듈들의 직류단 전압 불균형 문제가 발생한다. 이를 해결하기 위해 각 모듈의 직류단 전압을 제어한다. 본 논문에서는 EtherCAT 통신을 사용하여 ISOP 연결된 컨버터를 제어하였고 10개의 컨버터 모듈을 이용한 실험을 통해 제시하는 방법의 성능을 검증하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.443-450
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• 2014

This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

• Journal of the Korean Society for Railway
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• v.19 no.5
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• pp.617-628
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• 2016

This paper proposes the structure of a smart transformer to improve the performance of the 60Hz main power transformer for rolling stock. The proposed smart transformer is a kind of solid state transformer that consists of semiconductor switching devices and high frequency transformers. This smart transformer would have smaller size than the conventional 60Hz main transformer for rolling stock, making it possible to operate AC electrified track efficiently by power factor control. The proposed structure employs a cascade H-Bridge converter to interface with the high voltage AC single phase grid as the rectifier part. Each H-Bridge converter in the rectifier part is connected by a Dual-Active-Bridge (DAB) converter to generate an isolated low voltage DC output source of the system. Because the AC voltage in the train system is a kind of medium voltage, the number of the modules would be several tens. To control the entire smart transformer, the inner DC voltage of the modules, the AC input current, and the output DC voltage must be controlled instantaneously. In this paper, a control algorithm to operate the proposed structure is suggested and confirmed through computer simulation.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1791-1804
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• 2018

To achieve a fast dynamic response and to solve the multi-objective control problems of the output currents, capacitor voltages and system constraints, this paper proposes a deadbeat and hierarchical predictive control with space-vector modulation (DB-HPC-SVM) for five-level nested neutral point piloted (NNPP) converters. First, deadbeat control (DBC) is adopted to track the reference currents by calculating the deadbeat reference voltage vector (DB-RVV). After that, all of the candidate switching sequences that synthesize the DB-RVV are obtained by using the fast SVM principle. Furthermore, according to the redundancies of the switch combination and switching sequence, a hierarchical model predictive control (MPC) is presented to select the optimal switch combination (OSC) and optimal switching sequence (OSS). The proposed DB-HPC-SVM maintains the advantages of DBC and SVM, such as fast dynamic response, zero steady-state error and fixed switching frequency, and combines the characteristics of MPC, such as multi-objective control and simple inclusion of constraints. Finally, comparative simulation and experimental results of a five-level NNPP converter verify the correctness of the proposed DB-HPC-SVM.