• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2008년도 제35회 하계학술대회 초록집
• /
• pp.130-130
• /
• 2008

• Transactions on Electrical and Electronic Materials
• /
• 제16권5호
• /
• pp.290-292
• /
• 2015

We have reported about bipolar resistive switching effect on Poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene]:Graphene oxide composite films, which are sandwiched between aluminum and indium tin oxide electrodes. In this case, I-V sweep curve showed a hysteretic behavior, which varied according to the polarity of the applied voltage bias. The device exhibited excellent switching characteristics, with the ON/OFF ratio being approximately two orders in magnitude. The device had good endurance (10⁵ cycles without degradation) and long retention time (5 × 10³ s) at room temperature. The bistable switching behavior varied according to the trapping and de-trapping of charges on GO sites; the carrier transport was described using the space-charge-limited current (SCLC) model.

• 마이크로전자및패키징학회지
• /
• 제27권1호
• /
• pp.25-29
• /
• 2020

광화학증착법 (PMOD; photochemical metal-organic deposition)을 이용하여 photoresist 및 etching 공정없이 pattern 된 TiO_x resistive switching (RS) 소자를 제작 및 그 특성을 평가하였다. Ti(IV) 2-ethylhexanoate를 출발물질로 사용하였으며 UV 노출시간 10 min에 광화학반응이 완료됨을 FTIR 분석을 통하여 확인하였다. 200 ℃ 이하 저온공정에서 직접패턴 된 20 nm 두께의 비정질 TiO_x 박막의 균일한 두께의 패턴형성을 Atomic Force Microscopy를 통하여 확인하였다. 별도의 상형성을 위한 후 열처리 공정 없이 4 ㎛ 선폭의 전극위에 형성된 20 nm 두께의 비정질 TiO_x RS 소자는 4V 동작전압에서 on/off ratio 20의 forming-less RS 특성을 나타내었다. Electrochemical migration에 영향을 미치는 grain boundary가 없어 소자간 신뢰성 향상이 기대되며, flexible 기판 또는 저온공정이 요구되는 메모리 소자 공정에서 PMOD 공정이 응용될 수 있음을 보여준다. Selector를 이용하여 crossbar array 구조를 도입할 경우 매우 간단한 구조의 저비용 메모리 소자를 구현할 수 있을 것으로 기대 된다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.427-427
• /
• 2012

Ferroelectric-gate field effect transistor based memory using a nanowire as a conducting channel offers exceptional advantages over conventional memory devices, like small cell size, low-voltage operation, low power consumption, fast programming/erase speed and non-volatility. We successfully fabricated ferroelectric nonvolatile memory devices using both n-type and p-type Si nanowires coated with organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] via a low temperature fabrication process. The devices performance was carefully characterized in terms of their electrical transport, retention time and endurance test. Our p-type Si NW ferroelectric memory devices exhibit excellent memory characteristics with a large modulation in channel conductance between ON and OFF states exceeding $10^5$; long retention time of over $5{\times}10^4$ sec and high endurance of over 105 programming cycles while maintaining ON/OFF ratio higher $10^3$. This result offers a viable way to fabricate a high performance high-density nonvolatile memory device using a low temperature fabrication processing technique, which makes it suitable for flexible electronics.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
• /
• pp.393-395
• /
• 2009

We fabricated oxide and oxide/organic hybrid TFTs on a glass substrate using the photolithography process under $200^{\circ}C$. We adopt the solution processed organic ferroelectric materials of P(VDF-TrFE) and polyimide (KSPI) insulator for 1-T structure memory and flexible device, respectively. All devices have successfully operated and showed the possibility of hybrid TFTs for the application to the flexible electronic devices.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
• /
• pp.647-650
• /
• 2006

Low temperature polycrystalline silicon (LTPS) technology using a high power laser have been widely applied to thin film transistors (TFTs) for liquid crystal, organic light emitting diode (OLED) display, driver circuit for system on glass (SOG) and static random access memory (SRAM). Recently, the semiconductor industry is continuing its quest to create even more powerful CPU and memory chips. This requires increasing of individual device speed through the continual reduction of the minimum size of device features and increasing of device density on the chip. Moreover, the flat panel display industry also need to be brighter, with richer more vivid color, wider viewing angle, have faster video capability and be more durable at lower cost. Kornic Systems Co., Ltd. developed the $KORONA^{TM}$ LTP/GLTP series - an innovative production tool for fabricating flat panel displays and semiconductor devices - to meet these growing market demands and advance the volume production capabilities of flat panel displays and semiconductor industry. The $KORONA^{TM}\;LTP/GLTP$ series using DPSS laser and XeCl excimer laser is designed for the new generation of the wafer & FPD glass annealing processing equipment combining advanced low temperature poly-silicon (LTPS) crystallization technology and object-oriented software architecture with a semistandard graphical user interface (GUI). These leading edge systems show the superior annealing ability to the conventional other method. The $KORONA^{TM}\;LTP/GLTP$ series provides technical and economical benefits of advanced annealing solution to semiconductor and FPD production performance with an exceptional level of productivity. High throughput, low cost of ownership and optimized system efficiency brings the highest yield and lowest cost per wafer/glass on the annealing market.

• 한국진공학회지
• /
• 제20권5호
• /
• pp.327-332
• /
• 2011

ITO가 코팅된 유리 기판 위에 플라즈마 중합법으로 styrene 고분자 박막을 제작하고 상부 전극을 진공 열증착법으로 제작된 Au 박막으로 한 MIM (metal-insulator-metal) 소자를 제작하였다. 또한, 플라즈마 중합된 styrene 고분자 박막을 유기 절연박막으로 하고 진공열증착법으로 pentacene 유기반도체 박막을 제작하여 유기 MIS (metal-insulator-semiconductor) 소자를 제작하였다. 플라즈마 중합법으로 제작된 styrene (ppS; plasma polymerized styrene) 고분자 박막은 styrene 단량체(모노머) 고유의 특성을 유지하면서 고분자 박막을 형성함을 확인하였으며, 통상적인 중합법으로 제작된 고분자 박막 대비 k=3.7의 높은 유전상수 값을 보였다. MIM 및 MIS 소자의 I-V 및 C-V 측정을 통하여 ppS 고분자 박막은 전계강도 $1MVcm^{-1}$에서 전류밀도 $1{\times}10^{-8}Acm^{-2}$ 수준의 낮은 누설전류를 보이고 히스테리시스가 거의 없는 우수한 절연체 박막임이 판명되었다. 결과적으로 유기박막 트랜지스터 및 유기 메모리 등 플렉서블 유기전자소자용 절연체 박막으로의 응용이 기대된다.

• 한국산학기술학회논문지
• /
• 제16권3호
• /
• pp.2131-2134
• /
• 2015

본 논문에서는 종이를 기판으로 사용하고 용액공정이 가능한 강유전체 메모리 소자의 제작 가능성을 검토하였다. 유기물 강유전체인 "폴리비닐리덴트리플루오르에틸렌" 용액을 하부전극이 형성된 종이기판 위에 스핀코핑 방법을 이용하여 도포하였다. 하부전극으로는 진공증착법을 이용하여 알루미늄을 증착하였고, 도포된 "폴리비닐리덴트리플루오르에틸렌" 용액은 열처리 과정을 통해 결정화하였다. 제작된 "폴리비닐리덴트리플루오르에틸렌" 박막은 주사 전자 현미경법(SEM), 원자간력 현미경(AFM)을 이용하여 박막의 단면 및 표면의 특성을 평가하였다. 전압에 따른 분극특성 측정을 통해, 종이기판 위에 형성된 "폴리비닐리덴트리플루오르에틸렌" 박막이 매우 훌륭한 강유전체 특성을 보여주고 있음을 확인하였다. 또한, 종이기판의 응용가능성을 검토하기 위하여, 실리콘 기판위에 제작한 "폴리비닐리덴트리플루오르에틸렌" 박막과의 비교에 있어서도 손색없는 강유전체 특성을 보여주고 있음을 알 수 있었다. 이러한 결과들은 종이를 기판으로 이용하여 전자소자들을 제작 할 수 있음을 시사하며, 또한 용액공정으로 고밀도의 저렴한 강유전체 메모리 소자를 손쉽게 제작 할 수 있다는 것을 의미한다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2009년도 하계학술대회 논문집
• /
• pp.52-52
• /
• 2009

To date, chalcogenide alloy such as $Ge_2Sb_2Te_5$(GST) have not only been rigorously studied for use in Phase Change Random Access Memory(PRAM) applications, but also temperature gap to make different states is not enough to apply to device between amorphous and crystalline state. In this study, we have investigated a new system of phase change media based on the In-Sb-Te(IST) ternary alloys for PRAM. IST chalcogenide thin films were prepared in trench structure (aspect ratio 5:1 of length=500nm, width=100nm) using Tri methyl Indium $(In(CH_3)_4$), $Sb(iPr)_3$ $(Sb(C_3H_7)_3)$ and $Te(iPr)_2(Te(C_3H_7)_2)$ precursors. MOCVD process is very powerful system to deposit in ultra integrated device like 100nm scaled trench structure. And IST materials for PRAM can be grown at low deposition temperature below $200^{\circ}C$ in comparison with GST materials. Although Melting temperature of 1ST materials was $\sim 630^{\circ}C$ like GST, Crystalline temperature of them was ~$290^{\circ}C$; one of GST were $130^{\circ}C$. In-Sb-Te materials will be good candidate materials for PRAM applications. And MOCVD system is powerful for applying ultra scale integration cell.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제2권3호
• /
• pp.205-212
• /
• 2002

The growth characteristics of metal-organic chemical vapor deposition (MOCVD) $Pb(Zr_xTi_{1-x})O_3 (PZT) thin films were investigated for the application of high-density ferroelectric random access memories (FRAM) devices beyond 64Mbit density. The supply control of Pb precursor plays the most critical role in order to achieve a reliable process for PZT thin film deposition. We have monitored the changes in the microstructure and electrical properties of films on increasing the Pb precursor supply into the reaction chamber. Under optimized conditions, $Ir/IrO_2/PZT(100nm)/Ir capacitor shows well-saturated hysteresis loops with a remanent polarization (Pr) of $~28{\mu}C/textrm{cm}^2$ and coercive voltage of 0.8V at 2.5V. Other issues such as step coverage, compositional uniformity and low temperature deposition was discussed in viewpoint of actual device application.