• 제목/요약/키워드: Operation margin

검색결과 402건 처리시간 0.026초

전력시스템 안전도 향상을 위한 다기 UPFC의 최적 운전점 결정 (The Optimal Operating Points of Multiple UPFCs for Enhancing Power System Security Level)

  • 임정욱;문승일
    • 대한전기학회논문지:전력기술부문A
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    • 제50권8호
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    • pp.388-394
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    • 2001
  • This paper presents how to determine the optimal operating points of Unified Power Flow controllers (UPFC) the line flow control of which can enhance system security level. In order to analyze the effect of these devices on the power system, the decoupled model has been employed as a mathematical model of UPFC for power flow analysis. The security index that indicates the level of congestion of transmission line has been proposed and minimized by iterative method. The sensitivity of objective function for control variables of and UPFC has been derived, and it represents the change in the security index for a given set of changes in real power outputs of UPFC. The proposed algorithm with sensitivity analysis gives the optimal set of operating points of multiple UPECs that reduces the index or increases the security margin and Marquart method has been adopted as an optimization method because of stable convergence. The algorithm is verified by the 10-unit 39-bus New England system that includes multiple FACTS devices. The simulation results show that the power flow congestion can be relieved in normal state and the security margin can be guaranteed even in a fault condition by the cooperative operation of multiple UPECs.

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모바일 3D 그래픽 프로세서의 지오메트리 연산을 위한 부동 소수점 연산기 구현 (A design of Floating Point Arithmetic Unit for Geometry Operation of Mobile 3D Graphic Processor)

  • 이지명;이찬호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.711-714
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    • 2005
  • We propose floating point arithmetic units for geometry operation of mobile 3D graphic processor. The proposed arithmetic units conform to the single precision format of IEEE standard 754-1985 that is a standard of floating point arithmetic. The rounding algorithm applies the nearest toward zero form. The proposed adder/subtraction unit and multiplier have one clock cycle latency, and the inversion unit has three clock cycle latency. We estimate the required numbers of arithmetic operation for Viewing transformation. The first stage of geometry operation is composed with translation, rotation and scaling operation. The translation operation requires three addition and the rotation operation needs three addition and six multiplication. The scaling operation requires three multiplication. The viewing transformation is performed in 15 clock cycles. If the adder and the multiplier have their own in/out ports, the viewing transformation can be done in 9 clock cycles. The error margin of proposed arithmetic units is smaller than $10^{-5}$ that is the request in the OpenGL standard. The proposed arithmetic units carry out operations in 100MHz clock frequency.

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고속 DWA의 동작시간을 개선한 1.2V $3^{rd}$ 4bit 시그마 델타 변조기 설계 (The Design of 1.2V $3^{rd}$ Order 4bit Sigma Delta Modulator with Improved Operating Time of High Speed DWA)

  • 이순재;김선홍;조성익
    • 전기학회논문지
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    • 제57권6호
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    • pp.1081-1086
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    • 2008
  • This paper presents the $3^{rd}$ 4bit sigma delta modulator with the block and timing diagrams of DWA(Data Weighted Averaging) to optimize a operating time. In the modulator, the proposed DWA structure has a stable operation and timing margin so as to remove three latches and another clock. Because the modulator with proposed DWA structure improve timing margin about 23%. It can increase sampling frequency up to 244MHz. Through the MATLAB modeling, the optimized coefficients are obtained to design the modulator. The fully differential SC integrators, DAC, switch, quantizer, and DWA are designed by considering the nonideal characteristics. The designed $3^{rd}$ order 4bit modulator has a power consumption of 40mW and SNR(signal to noise ratio) of 77.2dB under 1.2V supply and 64MHz sampling frequency.

이중 부스팅 회로를 이용한 저전압 SRAM (A low voltage SRAM using double boosting scheme)

  • 정상훈;엄윤주;정연배
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.647-650
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    • 2005
  • In this paper, a low voltage SRAM using double boosting scheme is described. A low supply voltage deteriorates the static noise margin (SNM) and the cell read-out current. For read/write operation, a selected word line and cell VDD bias are boosted in a different level using double boosting scheme. This increases not only the static noise margin but also the cell readout current at a low supply voltage. A low voltage SRAM with 32K ${\times}$ 8bit implemented in a 0.18um CMOS technology shows an access time of 26.1ns at 0.8V supply voltage.

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Research on Voltage Stability Boundary under Different Reactive Power Control Mode of DFIG Wind Power Plant

  • Ma, Rui;Qin, Zeyu;Yang, Wencan;Li, Mo
    • Journal of Electrical Engineering and Technology
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    • 제11권6호
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    • pp.1571-1581
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    • 2016
  • A novel method is proposed to construct the voltage stability boundary of power system considering different Reactive Power Control Mode (RPCM) of Doubly-Fed Induction Generator (DFIG) Wind Power Plant (WPP). It can be used for reflecting the static stability status of grid operation with wind power penetration. The analytical derivation work of boundary search method can expound the mechanism and parameters relationship of different WPP RPCMs. In order to improve the load margin and find a practical method to assess the voltage security of power system, the approximate method of constructing voltage stability boundary and the critical points search algorithms under different RPCMs of DFIG WPP are explored, which can provide direct and effective reference data for operators.

시일의 마멸이 다단 터빈 펌프 동특성에 미치는 영향 (Effect of Seal Wear on the Rotordynamics of a Multistage Turbine Pump)

  • 김영철;이동환;이봉주
    • 소음진동
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    • 제7권6호
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    • pp.1015-1023
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    • 1997
  • Rotordynamic analysis of a multistage turbine pump using finite element method is performed to investigate the effects of seal wear on its system behavior. Stiffness and damping coefficents of the 2-axial grooved bearing are obtained as functions of rotating speed. Stiffness and damping coefficients of plane annuler seals are calculated as functions of rotating speed as well as seal clearance of seals become larger, these stiffness and damping coefficients decrease drastically so that there can be significant changes in whirl natural frequencies and damping characteristics of the pump rotor system. Although a pump is designed to operate with a sufficient seperation margin from the 1st critical speed, seal wear due to long operation may cause a sudden increase in vibration amplitude by resonance shift and reduce seal damping capability.

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에너지 마진 제약에 의한 과도안정도를 고려한 급전 알고리즘 (Dispatch algorithm with energy margin constraints for transient stability)

  • 정연재;;;장동환;전영환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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    • pp.274-276
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    • 2005
  • Stability is an important constraint in powr system operation. A new methodology that reduces the need for repeated simulation to determine a transiently secure operating point is presented. at cntingency, critical generator is limited generation to prevent rotor accelation until system is secured. when energh margin is zero, generation is degermined Implementation issues and simulation results are discussed in th context of a 10-bus system.

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Reciprocal Sustain and Auxiliary Pulse Waveforms Applied to an AC PDP with an Auxiliary Electrode

  • Choi, Kyung-Cheol;Lee, Sung-Min;Choi, Chung-Sock;Jang, Cheol
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1543-1546
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    • 2008
  • Modified pulse waveforms were applied to an AC plasma display panel with an auxiliary electrode in order to improve the operation voltage margin. Reciprocal sustain pulse waveforms and modified auxiliary pulse waveforms were applied to the sustain and auxiliary electrode, respectively. During the sustain period, the influence of the address electrode on the luminous efficacy of long-coplanar gap discharges was mitigated by application of reciprocal sustain pulse waveforms. Modified auxiliary pulse waveforms maintained the high efficacy obtained from the AC PDP with an auxiliary electrode. The proposed reciprocal sustain and modified auxiliary pulses waveforms can induce stable discharges in long-coplanar gap discharges and can control wall charges with a wider auxiliary pulse voltage margin, thereby enhancing the luminous efficacy of the AC PDP with an auxiliary electrode.

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An Experimental 0.8 V 256-kbit SRAM Macro with Boosted Cell Array Scheme

  • Chung, Yeon-Bae;Shim, Sang-Won
    • ETRI Journal
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    • 제29권4호
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    • pp.457-462
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    • 2007
  • This work presents a low-voltage static random access memory (SRAM) technique based on a dual-boosted cell array. For each read/write cycle, the wordline and cell power node of selected SRAM cells are boosted into two different voltage levels. This technique enhances the read static noise margin to a sufficient level without an increase in cell size. It also improves the SRAM circuit speed due to an increase in the cell read-out current. A 0.18 ${\mu}m$ CMOS 256-kbit SRAM macro is fabricated with the proposed technique, which demonstrates 0.8 V operation with 50 MHz while consuming 65 ${\mu}W$/MHz. It also demonstrates an 87% bit error rate reduction while operating with a 43% higher clock frequency compared with that of conventional SRAM.

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75톤급 가스발생기 사이클 액체로켓엔진의 시험영역과 엔진 구성품 시험 영역의 결정 (Definition of Engine Component Performance Test Range of 75tf Class Gas Generator Cycle Liquid Propellant Rocket Engine)

  • 남창호;문윤완;설우석
    • 한국추진공학회지
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    • 제15권6호
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    • pp.91-97
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    • 2011
  • 75톤급 가스발생기 사이클 액체로켓엔진 개발을 위한 시험영역을 정의하였다. 엔진 시스템 영역은 비행시 발생하는 엔진 입구조건의 변화에 따른 변동과 각 구성품이 가지는 오차에 의한 성능 분산을 고려하고 추가의 성능 여유를 두도록 정의하였다. 엔진 시스템 시험에 상응하는 구성품의 작동영역을 정의하고 이에 추가의 여유를 두어 개발하도록 구성품 시험 영역을 정의하였다.