• 제목/요약/키워드: Operation layer

Search Result 1,096, Processing Time 0.033 seconds

Intrinsic Flux Inequality in Forward Osmosis (FO) and Pressure-Retarded Osmosis (PRO) Processes (수학적 귀납법을 이용한 정삼투 및 압력지연삼투 공정의 투과율 불균형 해석)

  • Kim, Albert S.;Lee, Seung-won
    • Membrane Journal
    • /
    • v.25 no.4
    • /
    • pp.367-372
    • /
    • 2015
  • In pressure-retarded osmosis (PRO) and forward osmosis (FO) processes, solvent (permeate) flux depends on which surface the draw solution faces. There are two operation modes. PRO mode indicates that the active layer faces the draw solution, and FO mode means that the porous substrate fronts the draw stream. It is often observed that the PRO mode produces higher flux than that of FO under the same operating conditions. The current work uses the method of proof by contradiction, and mathematically proves the intrinsic flux inequality between the two modes.

A Fully Synthesizable Bluetooth Baseband Module for a System-on-a-Chip

  • Chun, Ik-Jae;Kim, Bo-Gwan;Park, In-Cheol
    • ETRI Journal
    • /
    • v.25 no.5
    • /
    • pp.328-336
    • /
    • 2003
  • Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

  • PDF

Carbon nanotube/silicon hybrid heterojunctions for photovoltaic devices

  • Castrucci, Paola
    • Advances in nano research
    • /
    • v.2 no.1
    • /
    • pp.23-56
    • /
    • 2014
  • The significant growth of the Si photovoltaic industry has been so far limited due to the high cost of the Si photovoltaic system. In this regard, the most expensive factors are the intrinsic cost of silicon material and the Si solar cell fabrication processes. Conventional Si solar cells have p-n junctions inside for an efficient extraction of light-generated charge carriers. However, the p-n junction is normally formed through very expensive processes requiring very high temperature (${\sim}1000^{\circ}C$). Therefore, several systems are currently under study to form heterojunctions at low temperatures. Among them, carbon nanotube (CNT)/Si hybrid solar cells are very promising, with power conversion efficiency up to 15%. In these cells, the p-type Si layer is replaced by a semitransparent CNT film deposited at room temperature on the n-doped Si wafer, thus giving rise to an overall reduction of the total Si thickness and to the fabrication of a device with cheaper methods at low temperatures. In particular, the CNT film coating the Si wafer acts as a conductive electrode for charge carrier collection and establishes a built-in voltage for separating photocarriers. Moreover, due to the CNT film optical semitransparency, most of the incoming light is absorbed in Si; thus the efficiency of the CNT/Si device is in principle comparable to that of a conventional Si one. In this paper an overview of several factors at the basis of this device operation and of the suggested improvements to its architecture is given. In addition, still open physical/technological issues are also addressed.

Performance of Double Composite Landfill Liner considering Leakage Rate and Mass Flux

  • Nguyen, The Bao;Lee, Chul-Ho;Choi, Hang-Seok
    • Proceedings of the Korean Geotechical Society Conference
    • /
    • 2010.03a
    • /
    • pp.295-304
    • /
    • 2010
  • Performance of a landfill liner is evaluated based on leakage rate and mass flux. In this study, the recently utilized double composite liner system, which consists of a geomembrane (GM), a geosynthetic clay liner (GCL), a GM, and a compacted clay layer (61 or 91.5 cm) is compared with other popular composite liners including the single GCL system, the Subtitle D liner system, and the Wisconsin NR500 liner system. The leakage rate through circular and long defects in the GM of the landfill liners is analyzed using numerical models. For the mass flux criterion, the analyses of inorganic contaminant transport through defects in the GM component of liner systems and diffusion of organic compounds through intact landfill liners are conducted using three- and one-dimensional numerical models, respectively. Cadmium and toluene are used in the analyses as a typical inorganic and organic substance, respectively, which will be chemical species encountered during landfill operation. The comparison shows that the double composite liner systems are superior to the other liner systems according to the performance-based evaluation.

  • PDF

Hybrid Insulator Organic Thin Film Transistors With Improved Mobility Characteristics

  • Park, Chang-Bum;Jin, Sung-Hun;Park, Byung-Gook;Lee, Jong-Duk
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2005.07b
    • /
    • pp.1291-1293
    • /
    • 2005
  • Hybrid insulator pentacene thin film transistors (TFTs) were fabricated with thermally grown oxide and cross-linked polyvinylalcohol (PVA) including surface treatment by dilute ploymethylmethacrylate (PMMA) layers on $n^+$ doped silicon wafer. Through the optimization of $SiO_2$ layer thickness in hybrid insulator structure, carrier mobility was increased to above 35 times than that of the TFT only with the gate insulator of $SiO_2$ at the same transverse electric field. The carrier mobility of 1.80 $cm^2$/V-s, subthreshold swing of 1.81 V/decade, and $I_{on}$/ $I_{off}$ current ratio > 1.10 × $10^5$ were obtained at low bias (less than -30 V) condition. The result is one of the best reported performances of pentacne TFTs with hybrid insulator including cross-linked PVA material at low voltage operation.

  • PDF

Thermal Conductivity and Dielectric Strength Measurement of the Impregnating Materials for the Next Generation Winding Type Superconducting Fault Current Limiter (차세대권선형한류기를 위한 함침용 재료의 열전도도 및 절연 내력 측정)

  • Yang Seong Eun;Bae Duck Kweon;Ahn Min Cheol;Kang Hyoung Ku;Seok Bok Yeol;Chang Ho Myung;Kim Sang Hyun;Ko Tae Kuk
    • Progress in Superconductivity and Cryogenics
    • /
    • v.7 no.1
    • /
    • pp.42-46
    • /
    • 2005
  • The resistive type high temperature superconducting fault current limiter (HTSFCL) limits the fault current using the resistance generated by fault current. The generated resistance by fault current makes large pulse power which makes the operation of HTSFCL unstable. So, the cryogenic cooling system of the resistive type HTSFCL must diffuse and eliminate the pulse energy very quickly. Although the best way is to make wide direct contact area between HTS winding and coolant as much as possible, HTS winding also needs the impregnation layer which fixes and protects it from electromagnetic force. This paper deals with the thermal conductivity and dielectric strength of some epoxy compounds for the impregnation of high temperature superconducting (HTS) winding in liquid nitrogen. The measured data can be used in the optimal design of impregnation for HTS winding. Aluminar filling increased the thermal conductivity of epoxy compounds. Hardener also affected the thermal and electric characteristic of epoxy compounds.

Fabrication of a Silicon Hall Sensor for High-temperature Applications (고온용 실리콘 홀 센서의 제작)

  • Chung, Gwiy-Sang;Ryu, Ji-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2000.05b
    • /
    • pp.29-33
    • /
    • 2000
  • This paper describes on the temperature characteristics of a SDB(silicon-wafer direct bonding) SOI(silicon-on-insulator) Hall sensor. Using the buried oxide $SiO_2$ as a dielectrical isolation layer, a SDB SOI Hall sensor without pn junction isolation has been fabricated on the Si/$SiO_2$/Si structure. The Hall voltage and the sensitivity of the implemented SOI Hall sensor show good linearity with respect to the applied magnetic flux density and supplied current. In the temperature range of 25 to $300^{\circ}C$, the shifts of TCO(temperature coefficient of the offset voltage) and TCS(temperature coefficient of the product sensitivity) are less than ${\pm}6.7{\times}10^{-3}/^{\circ}C$ and ${\pm}8.2{\times}10^{-4}/^{\circ}C$, respectively. These results indicate that the SDB SOI structure has potential for the development of a silicon Hall sensor with a high-sensitivity and high-temperature operation.

  • PDF

Implementation of redundant MAP system (MAP 이중화 시스템의 구현)

  • Moon, Hong-Ju;Park, Hong-Sung;Kim, Won-Cheol;Park, Jung-Woo;Ahn, Sang-Cheol;Woo, Won-Sik;Kwon, Wook-Hyun
    • Proceedings of the KIEE Conference
    • /
    • 1992.07a
    • /
    • pp.248-251
    • /
    • 1992
  • In this paper, the RedMAP, i.e. a redundant Mini-MAP system for high reliability is proposed. Redundancy is implemented for LLC, MAC, and Physical layer of ISL-Mini -MAP. The detection of error of the network, the broadcasting of the error event, and the network change sequence are three major functions for the dualized Mini-MAP system. The abnormal operation of the network is mainly detected indirectly with the function of the TBC( token bus controller). The time delay to be required for the change of the networks must be minimized. With the RedMAP, we can achieve successful transmission only with short additional recovery time.

  • PDF

High Performance Electrode of Polymer Electrolyte Membrane Fuel Cells Prepared by Direct Screen Printing Process (직접 스크린 프린팅법으로 제조된 고분자 전해질 연료전지의 고성능 전극)

  • 임재욱;최대규;류호진
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.11 no.1
    • /
    • pp.65-69
    • /
    • 2004
  • Screen printing it one of the most popular methods for the fabrication of catalytic layer in electrode of polymer electrolyte membrane fuel cells (PEMFCs) due to its convenience and adaptability. This paper suggests an improved screen-printing method, which is rather simple suppressing the swelling trouble without additive process and competitive with very low Pt loading in comparison with the previous methods. Particularly, the gasket unified MEA made better performances than the other especially at high current area due to blocking effect on the gas leakage during the operation. These methods give us more simplified and faster fabrication chances.

  • PDF

Electrical Properties of Boron-Doped Amorphous Silicon Ambipolar Thin Film Transistor (보론 도우핑된 비정질 실리콘을 이용한 쌍극 박막 트랜지스터의 전기적 특성)

  • Chu, Hye-Yong;Jang, Jin
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.26 no.5
    • /
    • pp.38-45
    • /
    • 1989
  • We have studied the electrical characteristics of the hydrogenated amorphous silicon (a-Si:H) ambiploar thin film transistors (TET'S)using 100ppm boron-doped a-Si:H as an active layer. The enhancement of drain current due to the double injection behavior has been observed in the p-channel operation of the TFT. The drain current decreases with time in streched exponential form when the gate voltage is positive. The result indicates that the dangling bonds created by electron accumulation show identical time dependence as the diffusion of hydrogen in the film. We observed the experimental evidence that the doping efficiency changes either when the gate bias is applied or when the light is illuminated on boron-doped a-Si:H.

  • PDF