• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.395-401
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• 2015

This paper proposes a new bidirectional DC-DC converter with high efficiency. The proposed converter is composed of a flyback and a tapped-inductor boost converter to satisfy extreme operating conditions with low cost. The outputs are connected in series to achieve a high-voltage step-up. In the reverse direction, the proposed converter has an extreme step-down voltage. In this study, the proposed converter was employed with a 100 W hardware prototype. To design the controller, a small-signal transfer function of the proposed converter is derived. For PV power conditioning systems, a maximum power point tracking method is applied with perturb and observe method. To verify the operation of the bidirectional power flow, the current controller is applied. All of the controllers are employed with a digital signal processor.

• ETRI Journal
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• v.32 no.4
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• pp.493-502
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• 2010

The operation time of an encoder is one of the critical implementation issues for satisfying the timing requirements of Long Term Evolution (LTE) systems because the encoder is based on binary operations. In this paper, we propose a design and implementation of a latency efficient encoder for LTE systems. By virtue of 8-bit parallel processing of the cyclic redundancy checking attachment, code block (CB) segmentation, and a parallel processor, we are able to construct engines for turbo codings and rate matchings of each CB in a parallel fashion. Experimental results illustrate that although the total area and clock period of the proposed scheme are 19% and 6% larger than those of a conventional method based on a serial scheme, respectively, our parallel structure decreases the latency by about 32% to 65% compared with a serial structure. In particular, our approach is more latency efficient when the encoder processes a number of CBs. In addition, we apply the proposed scheme to a real system based on LTE, so that the timing requirement for ACK/NACK transmission is met by employing the encoder based on the parallel structure.

• Proceedings of the IEEK Conference
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• 2002.06a
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• pp.367-370
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• 2002

In this paper, we propose a new node architecture LonWorh control Network for home network system environmint using power line communications. Using conventional Lon Work technology is a many disputable points for home network. LonWork network system needs high-cost development equipment. Moreover, conventional Lon Work system can not implement high-grade algorithms and variety application operation. because of the limitation of processing ability in Neuron chip. For that reason, the proposed structure is applicable to low-cost and more complex applications which are impossible in home network using conventional Lonworks structure. The proposed structure is implemented with some hardware and かone software for power line home network. The physical layer and the MAC layer of the LonTalk protocol within ton Work are implemented in hardware, which decreases the development costs communication processor. The upper of link layer of the LonTalk protocol is implemented with software, which decreases the development costs of software and increases the flexibility of tile system and increases the extension of the system. We verified the commercial feasibility of the proposed system through the power line tests with the existing LonWorks network in home network. As a result, it is concluded that the proposed architecture provides increasing flexibility and decreasing cost of the system.

• Journal of the Korean Magnetics Society
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• v.27 no.1
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• pp.35-40
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• 2017

Kerr microscopy was assembled to observe magnetic domain image of ultra thin 3 %Si-Fe by using parts of an optical microscope. Digital images were obtained from CCD camera attached to the microscopy. A method was suggested to decide a boundary between magnetic domain regions in this study. The method was using some operations such as subtraction, integration and least mean square approximation for pixel values in the digital image. The method has a strong point that high priced image processor is not needed in the Kerr microscopy system. From the results that three different domain walls were observed and magnetic flux density of 0.085 [T], this method could be applied in the magnetic domain regions having a straight $180^{\circ}$ domain wall.

• Convergence Security Journal
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• v.12 no.2
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• pp.13-21
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• 2012

The purpose of this study is to profile actual conditions of personal information protection systems operated in overseas countries and examine major considerations of personal information that security service providers must know in the capacity of privacy information processor, so that it may contribute to preventing potential occurrence of any legal disputes in advance. Particularly, this study further seeks to describe fundamental idea and principle of said Personal Information Protection Act; enhancement of various safety measures (e.g. collection/use of privacy data, processing of sensitive information/personal ID information, and encryption of privacy information); restrictions on installation/operation of video data processing devices; and penal regulations as a means of countermeasure against leakage of personal information, while proposing possible solutions to cope with these matters. Using cases among foreign countries for this study.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.8
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• pp.557-564
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• 2000

A very simple control approach using neural network for the robust position control of a Permanent Magnet Synchronous Motor(PMSM) is presented. The linear quadratic controller plus feedforward neural network is employed to obtain the robust PMSM system approximately linearized using field-orientation method for an AC servo. The neural network is trained in on-line phases and this neural network is composed by a feedforward recall and error back-propagation training. Since the total number of nodes are only eight, this system can be easily realized by the general microprocessor. During the normal operation, the input-output response is sampled and the weighting value is trained multi-times by error back-propagation method at each sample period to accommodate the possible variations in the parameters or load torque. In addition, the robustness is also obtained without affecting overall system response. This method is realized by a floating-point Digital Signal Processor DS1102 Board (TMS320C31).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.995-998
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• 2005

This paper proposes a new SoC (System-on-Chip)-based automatic compensation circuit (ACC) for 5GHz low noise amplifier (LNA). This circuit is extremely useful for today's RF IC (Radio Frequency Integrated Circuit) devices in a complete RF transceiver environment. The circuit contains RF BIST (Built-ln Self-Test) circuit, Capacitor Mirror Banks (CMB) and digital processing unit (DPU). The ACC automatically adjusts performance of 5GHz LNA by the processor in the SoC transceiver when the LNA goes out of the normal range of operation.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.8
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• pp.951-957
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• 1999

The saddle node bifurcation (SNB) and the distance voltage instability are valuable information in power system planning and operation. This paper presents a new efficient, robust and unified strategy to compute the SNB by the combined use of the continuation power flow (CPF), Point of Collapse (PoC) method, and the method of a pair of multiple load flow solutions (PMLFS) with Lagrange interpolation utilizing only their advantages: the approximate nose curves and critical loading are determined fast by Lagrange-interpolating two stable and two unstable solutions obtained by using the robust CPF and PMLFS; the exact SNB is computed by the quadratically converging PoC method. The proposed method has been tested on Klos-Kerner 11-bus, New England 30-bus, IEEE 118-bus and KEPCO 791-bus systems. The method is found to be so efficient that computation time for determining the SNB of the KEPCO 791-bus system is 17.82 sec by a notebook PC with 300 MHz Pentium processor.

• Proceedings of the KOSOMBE Conference
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• v.1996 no.05
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• pp.207-212
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• 1996

We developed pneumatic blood pump and its driving system as a pediatric ventricular assist device. The blood pump is diaphragm type system and its blood contacting area is coated with Bio-Span. The driving unit Is consists of dual pumps, valves for the reliable blood pumping and its controller uses 80C196(Intel) as a main processor. The acute animal experiment was performed with dogs and its body weight is about 20 kg. The maximum cardiac output is about 2.1 l/min and the pressure and flow curves showed reliable operation as assist device.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.107-110
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• 2017

According to researches, while the speed of processor and network in embedded devices is fast enough to meet user requirement, the IO speed is recognized as the main performance bottleneck. Meanwhile it is known that more than 70 percent of IOs are issued from SQLite database. Many researches related SQLite performance optimization is based on WAL mode because WAL mode optimized for write IO performance. In this paper, I propose to optimize SQLite with Atomic Write in the Rollback Journal Mode, which is mainly used in Android and Tizen. I have observed that Atomic Write have a significant write performance improvement(300%) by reducing write, file sync operation and memory usage improvement(80%). Additionally it can block JOJ(Journaling of Journal) and extend the life of the flash memory.