• Journal of the Korean Society for Precision Engineering
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• v.20 no.1
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• pp.85-90
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• 2003

Removal rate and Within Wafer Non-Uniformity (WIWNU), the most critical issues in Chemical Mechanical Polish (CMP) process, are related to the pressure distribution, wafer shape, slurry flow, mechanical property of pad and etc. Among them, wafer warp generated by other various manufacturing process of wafer may induce the deviation of pressure distribution on the backside of wafer. In the convex shaped wafer the pressure onto the backside of wafer is higher than that of perfectly flat shaped wafer. Besides, such an added pressure is in proportion to the curvature of wafer. That is, the bigger the curvature of wafer becomes the higher the removal rate goes. And the WIWNU is known to be directly related to the pressure distribution on the wafer as well. In other words, the deviation of pressure distribution is in proportion to the WIWNU. In this paper, it is found that the wafer shape may be modified through heating the backside of it and thus properly changed pressure onto the backside of it may improve the WIWNU.

• Journal of Institute of Control, Robotics and Systems
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• v.8 no.9
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• pp.812-817
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• 2002

This paper presents a development of high accuracy aligner and describes a method to find the orientation of a substantially circular disk shaped wafer with at least one flat region on an edge thereof. In the developed system, the wafer is spun one 360 degree turn on a chuck and the edge position is measured by a linear array to obtain a set of data points at various wafer orientation. The rotation axis may differ from wafer center by an unknown eccentricity. The flat angle is found by fitting a cosine curve to the actual data to obtain a deviation. The maximum deviation is then corrected for errors due to a finite number of data points and wafer eccentricity by calculating an adjustment angle from data points on the wafer fiat. After determining the flat angle the wafer is spun to the desired orientation. The wafer eccentricity can be calculated from four of the data points located away from the flat edge region. and the wafer is then centered.

• Proceedings of the KSME Conference
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• 2003.04a
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• pp.980-986
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• 2003

As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive, the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, Ist, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the effect of the wheel path density and relative velocity on the characteristic of ground wafer in in-feed grinding with cup-wheel. It seems that the variation of the parameters in radial direction of wafer results in the non-uniform surface quality over the wafer. So, in this paper, the geometric analysis on grinding process is carried out, and then, the effect of the parameters on wafer surface quality is evaluated

• Journal of the Semiconductor & Display Technology
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• v.13 no.1
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• pp.13-17
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• 2014

Since the semiconductor manufacturing requires the silicon wafers with extraordinary degree of surface flatness, the surface polishing of wafers from ingot cutting is an important process for deciding surface quality of wafers. The present study introduces the development of wafer polishing equipment and, especially, the wafer polishing head that employs the forced self-driving of installed silicon wafer as well as the wax wafer mounting technique. A series of wafer polishing tests have been carried out to investigate the effects of self-driving function in wafer polishing head. The test results for wafer planarization showed that the LLS counts and SBIR of polished wafer surfaces were generally improved by adopting the self-driven polishing head in wafer polishing stations.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.32 no.2
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• pp.149-157
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• 2008

During CVD process of semiconductor wafer fabrication, maintaining the uniformity of temperature distribution at wafer top surface is one of the key factors affecting the quality of final products. Effect of contact conductance between wafer and hot plate on predicted temperature of wafer was investigated. The validity of opaque wafer assumption was also examined by comparing the predicted results with Discrete Ordinate solutions accounting for semitransparent radiative characteristics of silicon. As the contact conductance increases predicted wafer temperature increases and the differences between maximum and minimum temperatures within wafer and between wafer and hot plate top surface temperatures decrease. The opaque assumption always overpredicted the wafer temperature compared to semitransparent calculation. The influences of surrounding reactor inner wall temperature and hot plate configuration are then discussed.

• Journal of the Semiconductor & Display Technology
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• v.2 no.3
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• pp.31-36
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• 2003

On this study, an E.E(End-Effector) for the 300 mm wafer transfer robot system is newly suggested. It is a mechanical type with $180^{\circ}$ rotating ranges and is composed of 3-point arms, two plate springs and single-axis DC motor controlled by microchip. To design, relationship between the gripping force and the wafer deformation is analyzed by FEM. By analytic results, the gripping force for 300 mm wafer is confirmed as 255~274 gf. From experimental results on gripping force, repeatable position accuracy and gripping cycle times in a wafer cleaning system, we confirmed that the suggested E.E was well designed to satisfiy on the required performance for 300 mm wafer transfer robot system.

• Journal of the Semiconductor & Display Technology
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• v.8 no.2
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• pp.31-35
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• 2009

In the silicon wafer polishing process, the mounting stage of silicon wafer on the ceramic carrier block has been using the polishing template which utilizes the porous surface instead of traditional wax mounting method. Here in this article, the experimental study is carried out in order to study the wafer demounting by water jet and the effects of operating conditions such as the water jet flowrate and the number of water jet nozzles on the wafer demounting time. It is found that the measured wafer demounting time is inversely proportional to the water flowrate per nozzle, regardless of number of nozzles used; implying that the stagnation pressure by the water jet impingement is the dominant key factor. Additionally, by using the transparent disk instead of wafer, the air bubble formation and growth is observed under the disk, making the passage of water flow, and subsequently demounting the wafer from the porous pad.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.05a
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• pp.20-23
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• 2002

In silicon wafer manufacturing process, the grinding process has been adopted to improve the quality of wafer such as flatness, roughness and so on. This paper describes the effect of grinding process on the surface quality of wafer. The experiments are carried out by high precision in fred grinder with air bearing spindle. The relationship between the inclination of chuck table and the flatness of wafer is investigated, and the effect of grinding conditions including wheel speed, table speed, and feed rate on damage depth and roughness of wafer is also investigated. The experimental results show that there is close relationship between the inclination of the chuck table and the flatness of wafer, and the grinding conditions within this paper little affect the flatness of wafer and relatively high affect the damage depth of wafer.

• Journal of the Semiconductor & Display Technology
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• v.16 no.1
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• pp.29-33
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• 2017

This paper presents a development of vision aligner with three channels for the wafer and plate bonding machine in manufacturing of LED. The developed vision aligner consists of three cameras and performs wafer alignment of rotation and translation, flipped wafer detection, and UV Tape detection on the target wafer and plate. Normally the process step of wafer bonding is not defined by standards in semiconductor's manufacturing which steps are used depends on the wafer types so, a lot of processing steps has many unexpected problems by the workers and environment of manufacturing such as the above mentioned. For the mass production, the machine operation related to production time and worker's safety so the operation process should be operated at one time with considering of unexpected problem. The developed system solved the 4 kinds of unexpected problems and it will apply on the massproduction environment.

• Journal of the Semiconductor & Display Technology
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• v.21 no.1
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• pp.142-147
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• 2022

After introducing Hybrid Bonding technology into image sensors using stacked sensors and image processors, large quantity production became possible. As a result, it is currently used in most of the CMOS image market in smartphones and other image-based devices worldwide, and almost all stacked CIS manufacturing sites have focused on miniaturization using hybrid bonding. In this study, an upper wafer handling module for Wafer to Wafer Hybrid Bonding developed to increase the alignment and precision between wafers when wafer bonding. The module was divided two parts to reduce error of both the alignment and degree of precision during wafer bonding. Wafer handling module developed both new Tip/Tilt system controlling θx,θy of upper wafer and striker to push upper wafer. Based on this, it was confirmed through the stability evaluation that the upper wafer handling module can be controlled without any problem during W2W hybrid bonding.