• Title/Summary/Keyword: Novel Transceiver

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A Low Power smartRF Transceiver Hardware Design For 2.4 GHz Applications

  • Kim, Jung-Won;Choi, Ung-Se
    • Journal of IKEEE
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    • v.12 no.2
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    • pp.75-80
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    • 2008
  • There are many researches to reduce power consumption of battery-operated Transceiver for 2.4 GHz smartRF applications. However, components such as processor, memory and LCD based power managements reach the limit of reducing power consumption. To overcome the limit, this research proposes novel low-power Transceiver and transceiver Hardware Design. Experimental results in the real smartRF Transceiver show that the proposed methods can reduce power consumption additionally than component based power managements.

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A Study on Improvement of the Channel Efficiency of FH-SS Transceiver Based on DDS Technique

  • Kim, Gi-Rae;Choi, Young-Kyu
    • Journal of information and communication convergence engineering
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    • v.6 no.1
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    • pp.47-50
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    • 2008
  • A novel high channel efficiency transceiver based on a fast acquisition frequency synthesizer has been designed. The direct digital synthesis (DDS) technique is applied and a simple memory look-up table is incorporated to expedite channel acquisition. The technique simplifies the frequency control process in the transceiver and thus reduces the channel switching time. As a result, the channel efficiency is improved. The designed transceiver is ideal for frequency hopping mobile communication applications.

BER Performance Evaluation of Boss Map According to Delay Time in CDSK Modulation Scheme and Chaos Transceiver (CDSK 변조 방식과 카오스 송수신기의 지연시간에 따른 Boss Map의 BER 성능 평가)

  • Lee, Jun-Hyun;Keum, Hong-Sik;Lee, Dong-Hyung;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.7
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    • pp.365-371
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    • 2014
  • Chaos communication system is possible to improve the system security by using chaos signal. Further, it is possible to reduce the possibility of eavesdropping, and have strong characteristics from interference signal and jamming signal. However, BER(Bit Error Rate) performance of chaos system is worse than digital communication system. By this reason, researches in order to improve the BER performance of chaos communication system are being actively studied. In previous studies, we proposed a novel chaos map for BER performance improvement, and called it 'Boss map'. Also, we proposed a novel chaos transceiver for BER performance improvement. However, BER performance is evaluated differently according to delay time in transceiver. Therefore, in order to use Boss map effectively, we should find the optimal delay time in proposed chaos transceiver. In this paper, when Boss map is used, we evaluate BER performance of CDSK(Correlation Delay Shift Keying) system and novel chaos transceiver according to delay time. After evaluation of BER performance according to delay time, we find a delay time that is possible to have best BER performance in CDSK system and novel chaos transceiver.

A 6 Gbps/pin Low-Power Half-Duplex Active Cross-Coupled LVDS Transceiver with Switched Termination

  • Kim, Su-A;Kong, Bai-Sun;Lee, Chil-Gee;Kim, Chang-Hyun;Jun, Young-Hyun
    • ETRI Journal
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    • v.30 no.4
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    • pp.612-614
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    • 2008
  • A novel linear switched termination active cross-coupled low-voltage differential signaling (LVDS) transceiver operating at 1.5 GHz clock frequency is presented. On the transmitter side, an active cross-coupled linear output driver and a switched termination scheme are applied to achieve high speed with low current. On the receiver side, a shared pre-amplifier scheme is employed to reduce power consumption. The proposed LVDS transceiver implemented in an 80 nm CMOS process is successfully demonstrated to provide a data rate of 6 Gbps/pin, an output data window of 147 ps peak-to-peak, and a data swing of 196 mV. The power consumption is measured to be 4.2 mW/pin at 1.2 V.

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Novel UWB Transceiver for WBAN Networks: A Study on AWGN Channels

  • Zhao, Chengshi;Zhou, Zheng;Kwak, Kyung-Sup
    • ETRI Journal
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    • v.32 no.1
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    • pp.11-21
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    • 2010
  • A novel ultra-wideband (UWB) transceiver structure is presented to be used in wireless body area networks (WBANs). In the proposed structure, a data channel and a control channel are combined into a single transmission signal. In the signal, a modulation method mixing pulse position modulation and pulse amplitude modulation is proposed. A mathematical framework calculating the power spectrum density of the proposed pulse-based signal evaluates its coexistence with conventional radio systems. The transceiver structure is discussed, and the receiving performance is investigated in the additive white Gaussian noise channel. It is demonstrated that the proposed scheme is easier to match to the UWB emission mask than conventional UWB systems. The proposed scheme achieves the data rate requirement of WBAN; the logical control channel achieves better receiving performance than the logical data channel, which is useful for controlling and maintaining networks. The proposed scheme is also easy to implement.

Design of Core Chip for 3.1Gb/s VCSEL Driver in 0.18㎛ CMOS (0.18㎛ CMOS 3.1Gb/s VCSEL Driver 코아 칩 설계)

  • Yang, Choong-Reol;Lee, Sang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.1
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    • pp.88-95
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    • 2013
  • We propose a novel driver circuit design using $0.18{\mu}m$ CMOS process technology that drives a 1550 nm high-speed VCSEL used in optical transceiver. We report a distinct improvement in bandwidth, voltage gain and eye diagram at 3.1Gb/s data rate in comparison with existing topology. In this paper, the design and layout of a 3.1Gb/s VCSEL driver for optical transceiver having arrayed multi-channel of integrating module is confirmed.

A Novel 3-Level Transceiver using Multi Phase Modulation for High Bandwidth

  • Jung, Dae-Hee;Park, Jung-Hwan;Kim, Chan-Kyung;Kim, Chang-Hyun;Kim, Suki
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.791-794
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    • 2003
  • The increasing computational capability of processors is driving the need for high bandwidth links to communicate and store the information that is processed. Such links are often an important part of multi processor interconnection, processor-to-memory interfaces and Serial-network interfaces. This paper describes a 0.11-${\mu}{\textrm}{m}$ CMOS 4 Gbp s/pin 3-Level transceiver using RSL/(Rambus Signaling Logic) for high bandwidth. This system which uses a high-gain windowed integrating receiver with wide common-mode range which was designed in order to improve SNR when operating with the smaller input overdrive of 3-Level. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by low pass effects of channel, process-limited on-chip clock frequency, and serial link distance. In order to detect the transmited 4Gbps/pin with 3-Level data sucessfully ,the receiver is designed using 3-stage sense amplifier. The proposed transceiver employes multi-level signaling (3-Level Pulse Amplitude Modulation) using clock multi phase, double data rate and Prbs patten generator. The transceiver shows data rate of 3.2 ~ 4.0 Gbps/pin with a 1GHz internal clock.

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Design on the Interference Alignment Transceiver for Multi-Cell MIMO Downlink Channels (다중 셀 다중 안테나 하향링크 채널에서의 간섭 정렬 송수신기 설계)

  • Lee, Hyun-Ho;Ko, Young-Chai
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37B no.10
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    • pp.921-928
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    • 2012
  • In this paper, we propose a novel interference alignment transceiver for multi-cell MIMO downlink channels with arbitrary number of cells and users per cell. We design the receive beamformer to align the interference from undesired base stations to the effective inter-cell interference (ICI) channels. Subsequently, we design the transmit precoder which can nulllify the interference from the corresponding base station. The proposed transceiver design can attain the degrees of freedom (DOF) equal to the number of streams per user. Accordingly, we investigate conditions for the antenna configuration. From numerical results, we confirm that the proposed transceiver design can achieve higher DOF than the conventional scheme under equal antenna configuration.

Investigation of visible light communication transceiver applicable to both of illumination and wireless communication (조명 및 무선통신이 동시에 가능한 가시광 송수신기에 관한 연구)

  • Song, Seok-Su;Kong, Young-Sik;Park, Jin-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.4A
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    • pp.219-226
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    • 2012
  • We investigated the performance of a visible light communication (VLC) transceiver applicable to both of illumination and wireless communication. we considered the visibility of VLC, the easy connection for wireless communication and high-speed transmission and implemented VLC transceiver based on edge-emitting laser diode and silicon photodiode. The proposed VLC transceiver is designated to operate in a full duplex mode at high speed of 120 Mbit/s. The shielding method that is employed as a means to reduce the light cross coupling effect inside the VLC transceiver is proposed and its performance is experimentally measured. We also applied optical antenna to have the larger angle of field of view (FOV) to novel structure of VLC transceiver and examined and analyzed their bit error rate performance, photometric result with respect to the transmission distance, the coverage range and the tilt degree as transmission link characteristic between two transceivers without optical antenna and with optical antenna.