• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.3
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• pp.223-227
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• 2007

The effect of Eu contents on the ferroelectric properties of $Bi_{4-x}Eu_xTi_3 O_{12}$ (BET) thin films has been investigated. Bismuth Europium titanate thin films with a Eu contents were prepared on the $Pt/Ti/SiO_2/Si$ substrate by metal-organic decomposition technique. The structure and the morphology of the films were analyzed using X-ray diffraction (XRD) and field emission scanning microscopy (FE-SEM), respectively. From the XRD analysis, it was found that BET thin films have polycrystalline structure, and the layered-perovskite phase is obtained when the Eu contents exceeds 0.2 (x > 0.2). Also, the ferroelectric characteristics of the BET thin films were found to be dependent on the Eu content. Particularly, the BET films doped with x = 0.75 show better ferroelectric properties (remanent polarization 2Pr = 60.99 C/$cm^2$ and only a little polarization fatigue up to $3.5{\times}10^9$ bipolar switching cycling) than those doped with other Eu contents.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.264.2-264.2
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• 2014

비휘발성 메모리는 전원이 공급되지 않아도 저장된 정보를 계속 유지하는 메모리로써 현재 다양한 차세대 전자소자의 집적화 구현을 위해 저전압 동작 및 저장능력의 향상 등에 대한 연구가 활발히 진행되고 있다. 이때 삽입되는 전하저장층의 경우 기존 널리 이용되는 질화막(SiNx) 외에 최근에는 산화 알루미늄(Al2O3) 등의 고유전상수 물질 뿐만 아니라, 밴드갭 조절을 통해 전하저장능력을 향상시키는 산화막(SiOx)에 대한 연구도 진행 중이다. 이번 연구에서는 전하저장능력을 향상시키기 위해 전하저장층으로 산화막을 이용할 뿐만 아니라, 기존의 평편한 구조가 아닌 표면 조절을 통해 전하저장능력을 보다 향상시키고자 한다. 또한 이번 연구에서는 비휘발성 메모리 소자의 응용을 위해 우선적으로 금속-절연체-반도체 형태의 MOOxOyS 구조를 이용하였다. 이 때 실리콘 표면적을 변화시키기 위해 이용된 실리콘 웨이퍼는 1) 평편한 실리콘, 2) 수산화암모늄, 이소프로필 알코올 및 탈이온수를 혼합한 용액에 식각시킨 삼각형 구조, 3) 불산, 질산 및 아세트산을 혼합한 용액에 식각시킨 라운드 구조이다. 정전용량-전압 측정을 통해 얻어진 메모리 윈도우는 1) 평편한 실리콘의 경우 약 5.1 V, 2) 삼각형 구조의 경우 약 5.3 V, 3) 라운드 구조의 경우 약 5.9 V를 얻었다. 이 때, 라운드 구조의 경우 가장 넓은 표면적으로 인해 상대적으로 전하트랩이 가장 많이 되어 메모리 윈도우가 가장 커지는 특성을 볼 수 있었다.

• Journal of Korean Vacuum Science & Technology
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• v.5 no.2
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• pp.47-51
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• 2001

To obtain high remnant polarization and good crystalinity of ferroelectric thin films in non-volatile memory devices, the high temperature treatment in oxygen ambient is inevitable. Severe problems that occur in this process are oxygen diffusion into substrate, oxidation of electrode and buffer layer, degradation of microstructure and so on. We made ruthenium dioxide thin film by reactive sputtering with oxygen and argon mixture atmosphere. Comparing quantitatively the core-level spectra of Ru and RuO$_2$ obtained by x-ray photoelectron spectroscopy(XPS), we found that chemical state of RuO$_2$ is very stable and of good resistance to oxygen diffusion and oxidation of adjacent layers. It opens the use of RuO$_2$ thin film as a multifunctional layer of good conducting electrode and resistive barrier for the diffusion and the oxidation. We also suggest a correct understanding of Ru 3d core-level spectrum for RuO$_2$ based on the scheme of final state screening and charge transfer satellites.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.5
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• pp.665-671
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• 2011

The Competitiveness of Hybrid hard disk drive(H-HDD) for solid state disk(SSD) comes from both lower power consumption and higher reading speed. This paper suggests a prefetching scheme that can improve the performance of Non-Volatile cache(NVCache) memory installed on the H-HDD through prefetching disk blocks as well as files to the NVCache. The proposed scheme makes the highly used data such as booting files copy to the NVCache as an unit of file and the frequently accessed blocks copy to the NVCache. This prefetching is done on the idle time of disk queue and the priorities of prefetched target blocks are based on both time and spatial locality of blocks. Experiments results show that the suggested method can improve response time of H-HDD and also lower the power consumption.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.9
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• pp.764-769
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• 2002

The effect of excess Bi contents on the ferroelectric properties of B $i_{3.25}$ L $a_{0.75}$ $Ti_3$ $O_{12}$ (BLT) thin films has been investigated. Bismuth lanthanum titanate thin films with excess Bi contents were prepared onto Pt/Ti/ $SiO_2$/Si substrate by metalorganic decomposition (MOD) technique. The structure and morphology of the films were analyzed using X-ray diffraction (XRD) and atomic force microscopy (AFM), respectively. From the XRD analysis, BLT thin films show polycrystalline structure and the layered-perovskite phase was obtained over 10% excess of Bi contents. As a result of ferroelectric characteristics related to the Bi content of the BLT thin film, the remanent polarization and dielectric constant decreased with increasing over Bi content of 10% excess. The BLT film with Bi content of 10% excess was measured to have a dielectric constant of 326 and dielectric loss of 0.024. The BLT thin films showed little polarization fatigue test up to 3.5$\times$10$^{9}$ bipolar switching cycling.

• ETRI Journal
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• v.42 no.5
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• pp.748-760
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• 2020

MapReduce is a framework that can process huge datasets in parallel and distributed computing environments. However, a single machine failure during the runtime of MapReduce tasks can increase completion time by 50%. MapReduce handles task failures by restarting the failed task and re-computing all input data from scratch, regardless of how much data had already been processed. To solve this issue, we need the computed key-value pairs to persist in a storage system to avoid re-computing them during the restarting process. In this paper, the task failure resilience (TFR) technique is proposed, which allows the execution of a failed task to continue from the point it was interrupted without having to redo all the work. Amazon ElastiCache for Redis is used as a non-volatile cache for the key-value pairs. We measured the performance of TFR by running different Hadoop benchmarking suites. TFR was implemented using the Hadoop software framework, and the experimental results showed significant performance improvements when compared with the performance of the default Hadoop implementation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.8
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• pp.1369-1375
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• 2016

A rapid progress of the next-generation non-volatile memory device has been made in recent years. Metal/insulator/Metal multi-layer structure resistive RAM(ReRAM) has attracted a great deal of attention because it has advantages of simple fabrication, low cost, low power consumption, and low operating voltage. This paper describes the working principle of the ReRAM device, a review of fabrication techniques, and characteristics of flexible ReRAM devices using graphene oxide as an insulating layer and ReRAM devices using multi-layered insulator. The switching characteristics of the above ReRAM devices have been compared. The oxidized graphene could be employed as an insulator of next generation ReRAM devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.95-96
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• 2005

나노 구조 제작을 위한 다양한 시도 중 블록 공중합체를 이용한 방법은 현재 활발한 연구가 진행되고 있는 분야이다. 본 연구에서는 비휘발성 메모리 소자의 용량 증가를 위하여 블록 공중합체 박막을 나노 마스크로 이용하고, 평행판헝 반응관 내에서 반응성 이온 에칭을 사용하여 나노 구조의 표면을 제작하였다. 에칭동안에 나노 마스크로서 사용할 블록 공중합체 박막은 PS-b-PMMA를 이용하여 제작하였고, UV를 주사하여 PMMA를 제거하고 수직적인 나노 흩을 구성하여 나노 패터닝이 가능하도록 하였다. 실험을 통하여 매우 균일한 나노 바늘 형태의 구조를 생성할 수 있으며, 반응기체와 유량의 조절을 통하여 다양한 표면 구조를 확인할 수 있었다. 블록 공중합체는 나노 마스크로서 뛰어난 기능을 나타내며, 이를 이용하여 나노 사이즈의 패터닝이 가능하고, 표면적 증가를 통하여 비휘발성 메모리 소자의 용량 증가에 기여할 수 있다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.118-119
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• 2006

In the present work, we investigate the basic physical and thermal properties and electrical resistance change due to phase change in chalcogenide-based $Ge_1Se_1Te_2$ and $Ge_2Se_2Te_5$ thin films. The phase transition from amorphous to crystalline states, and vice versa, of $Ge_1Se_1Te_2$ and $Ge_2Se_2Te_5$ thin films by applying electrical pulses have been studied. The reversible phase transition between the amorphous and crystalline states, which is accompanied by a considerable change in electrical resistivity, is exploited as means to store bits of information.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.11 no.4
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• pp.63-69
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• 2012

This paper describes novel scheme of a gray scale capacitive fingerprint image for high-accuracy capacitive sensor chip. The typical gray scale image scheme used a DAC of big size layout or charge-pump circuit of non-volatile memory with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit of charge sharing scheme is proposed, which uses DLC(down literal circuit) based on a neuron MOS(vMOS) and analog simple multiplexor. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, a pixel layout size can be reduced and the image resolution can be improved.