• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.2
• /
• pp.320-326
• /
• 2008

In this paper, we propose a new algorithm emulating the DNA characteristics for noise-tolerant pattern matching problem on digital system. The digital pattern matching becomes core technology in various fields, such as, robot vision, remote sensing, character recognition, and medical diagnosis in particular. As the properties of natural DNA strands allow hybridization with a certain portion of incompatible base pairs, DNA-inspired data structure and computation technique can be adopted to bio-signal pattern classification problems which often contain imprecise data patterns. The key feature of noise-tolerance of DNA computing comes from control of reaction temperature. Our hardware system mimics such property to diagnose cardiovascular disease and results superior classification performance over existing supervised learning pattern matching algorithms. The hardware design employing parallel architecture is also very efficient in time and area.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.45 no.2
• /
• pp.137-144
• /
• 2008

In this paper, a novel voltage-controlled oscillator(VCO) using the output matching network based on the harmonic control circuit is presented for improving the phase noise property. The phase noise suppression is achieved through the harmonic control circuit having the short impedances for both second-harmonic and third-harmonic components, which has been connected at the output matching network. Also, we have used the microstrip square open loop multiple split-ring resonator(OLMSRR) having the high-Q property to further reduce the phase noise of VCO. Because the output matching network based on the harmonic control circuit has been used for reducing the phase noise property instead of the High-Q resonator, we can obtain the broad tuning range by the low-Q resonator. The phase noise of the proposed VCO using the output matching network based on the harmonic control circuit and the microstrip square OLMSRR has been $-127.5{\sim}126.33$ dBc/Hz @ 100 kHz in the tuning range, $5.744{\sim}5.839$ GHz. Compared with the reference VCO using the output matching network without the harmonic control circuit and the microstrip line resonator, the phase noise property of the proposed VCO has been improved in 26.66 dB.

• Proceedings of the KIEE Conference
• /
• 2006.07c
• /
• pp.1601-1602
• /
• 2006

A cascode low noise amplifier(LNA) for a 2.45GHz RFID reader is designed using 0.25um CMOS technology. There are four LNA design techniques applied to the cascode topology. In this paper, power-constrained simultaneous noise and input matching(PCSNIM) technique is used for low power consumption and achieving the noise matching and input matching simultaneously. Simulation results demonstrate a noise figure of 2.75dB, a power gain of 10.17dB, and a dissipation power of 8.65mW with 1V supply.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07b
• /
• pp.1222-1225
• /
• 2004

This paper presents multibit Sigma-Delta ADC using noise-shaped dynamic element matching(DEM). 5-bit flash ADC for multibit quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. The DEM algorithm is implemented in such a way as to minimize additional delay within the feedback loop of the modulator Using this algorithm, distortion spectra from DAC linearity errors are shaped. Sigma Delta ADC achieves 82dB signal to noise ratio over 615H7z bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is designed to use 0.25um CMOS technology with 2.5V supply voltage and verified by HSPICE simulation.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.24 no.11
• /
• pp.1424-1430
• /
• 2020

In this paper, we propose an algorithm to remove AWGN by considering the characteristics of noise present in the image. The proposed algorithm uses block matching to calculate the output, and calculates an estimate by determining the similarity between the center mask and the matching mask. The output of the filter is calculated by adding or subtracting the estimated value and the input pixel value, and weighting is given according to the standard deviation of the center mask and the noise constant to obtain the final output. In order to evaluate the proposed algorithm, the simulation was performed in comparison with the existing methods, and analyzed through the enlarged image and PSNR comparison. The proposed algorithm minimizes the effect of noise, preserves important characteristics of the image, and shows the performance of removing noise efficiently.

• Journal of information and communication convergence engineering
• /
• v.9 no.6
• /
• pp.671-675
• /
• 2011

DVC (Distributed Video Coding) and FRUC (Frame Rate Up Conversion) techniques need to have an efficient motion compensated frame interpolation algorithms. Conventional works of these applications have mainly focused on the performance improvement of overall system. But, in some applications, it is necessary to evaluate how well the MCI (Motion Compensated Interpolation) frame matches the original frame. For this aim, this paper deals with the modeling methods for evaluating the block-based matching cost. First, several matching criteria, which have already been dealt with the motion compensated frame interpolation, are introduced and then combined to make estimate models for the size of MSE (Mean Square Error) noise of the MCI frame to original one. Through computer simulations, it is shown that the block-based matching criteria are evaluated and the proposed model can be effectively used for estimating the MSE noise.

• Transactions of the Korean Society for Noise and Vibration Engineering
• /
• v.24 no.4
• /
• pp.310-316
• /
• 2014

The location template matching(LTM) method is a technique of identifying an impact location on a structure, and requires a certain measure of similarity between two time signals. In general, the correlation coefficient is widely used as the measure of similarity, while the group delay based method is recently proposed to improve the accuracy of the impact localization. Another possible measure is the frequency response assurance criterion(FRAC), though this has not been applied yet. In this paper, these three different measures of similarity are examined comparatively by using experimental data in order to understand the properties of these measures of similarity. The comparative study shows that the correlation coefficient and the FRAC give almost the same information while the group delay based method gives the shape oriented information that is best suitable for the location template matching method.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2014.04a
• /
• pp.506-511
• /
• 2014

The location template matching (LTM) method is a technique of identifying an impact location on a structure, and requires a certain measure of similarity between two time signals. In general, the correlation coefficient is widely used as the measure of similarity, while the group delay based method is recently proposed to improve the accuracy of the impact localization. Another possible measure is the frequency response assurance criterion (FRAC), though this has not been applied yet. In this paper, these three different measures of similarity are examined comparatively by using experimental data in order to understand the properties of these measures of similarity. The comparative study shows that the correlation coefficient and the FRAC give almost the same information while the group delay based method gives the shape oriented information that is best suitable for the location template matching method.

• ETRI Journal
• /
• v.28 no.3
• /
• pp.355-363
• /
• 2006

This paper presents a low-cost RF parameter estimation technique using a new RF built-in self-test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using $0.18\;{\mu}m$ SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.24 no.11
• /
• pp.1098-1103
• /
• 2013

A low-noise amplifier(LNA) using series RLC matching network and resistive feedback at 8 GHz is presented. Inductive degeneration is used for the input matching with which the proposed LNA shows quite a wide bandwidth in terms of $S_{21}$. An equivalent circuit model is deduced for input matching by conversion from parallel circuit to series resonant circuit. By exploiting the resistive feedback and series RLC input matching, fully integrated LNA achieves maximum $S_{21}$ of 8.5 dB(peak to -3 dB bandwidth is about 3.5 GHz) noise figure of 5.9 dB, and IIP3 of 1.6 dBm while consuming 7 mA from 1.2 V supply.