• Journal of KIISE:Computing Practices and Letters
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• v.7 no.2
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• pp.121-131
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• 2001

The failure of network and/or node on which server object is executed is a single point of system failure in the CORBA application. One of the possible ways to overcome such problem is to replicate server objects to several independent nodes. The replicated objects executing same tasks are called object group. In order to provide fault tolerance of server object, this paper proposes and implements new CORBA model that supports the object group based on active replication. The proposed model not only provides interoperability with existing CORBA application but also minimizes additional application interface required to support object group because it uses nop to exchange messages between client and server. And this paper extends IDL structure. Depending to application logic, it makes possible to prevent performance degradation caused by consistency maintenance. At present, this paper supports only active replication. But it can be easily extended to provide warm ancVor cold passive replication without modification of architecture required for active replication.

• Journal of the Korea Society of Computer and Information
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• v.15 no.10
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• pp.11-17
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• 2010

Mobile device, one of typical devices in ubiquitous environment, is received attention owing to portability. In these days, technical researches on a kind of the device are focusing on applications of smart phone. For example, the techniques using geographical position and applied instances such as augmented reality techniques are gradually increasing. That makes data processing important. Mobile application services for users also require various application techniques based on moving objects. In addition, they require the techniques that processed data are needed to be shown in visualization. However, this is reality that it lacks of showing visualization works to improve the understanding of thing what it is. To reduce or solve the problems, in this paper we show the results to implement the R tree based 3 dimension index architecture in visualization. Further, we implemented and present creating objects, showing in 3D for the objects, catching spatial position on a node map through mini map function and improving the understanding of R tree by visualizing.

• Proceedings of the Korea Information Assurance Society Conference
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• 2004.05a
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• pp.29-34
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• 2004

As the number of internet users grows rapidly, the services which users required becomes various. However, for fulfilling these various user requirements, the existing passive network should be standardized for a long time. To resolve the delay on providing services, active network as a new technology was suggested. Its router or switch with DARPA as center has the program running ability, so user oriented network can be composed. However, active network's architecture can resolve the user required service using mobile code on the network node, but it is more complex, easy-to-attack, various than the passive network. Many researchers have tried to resolve this problem. So, this paper studied the mobile code security service in active network environment to provide user's convenience and accommodation, and introduced ANASP system as an alternative.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.132-135
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• 2011

This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A novel memory reduction technique devised using the min-sum decoding algorithm reduces the size of check-node memory by 47% as compared to conventional method. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.411-421
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• 2002

In this paper, we present a new survivor path memory management method and a dedicated hardware architecture for the design of high-speed Viterbi decoders in modern digital communication systems. In the proposed method, a novel use of k-starting node number deciding circuits enables to acheive the immediate traceback of the merged survivor path from which we can decode output bits, and results in smaller survivor path memory size and processing delay time than the previously known methods. Also, in the proposed method, the survivor path memory can be constructed with ease using a simple standard dual-ported memory since one read-pointer and one write-pointer, that are updated at the same rate, are required for managing the survivor path: the previously known algorithms require either complex k-ported memory structure or k-times faster read capability than write. With a moderate hardware cost for immediate traceback capability the proposed method is superior to the previously known methods for high-speed Viterbi decoding.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.6
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• pp.361-361
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• 2000

In this paper, we propose a novel control signaling protocol that efficiently controls connection setup and increases the utilization of network resources. The proposed protocol, Separated Control Signaling Protocol(SCSP), separates bearer control from call control lot WDM optical networks. The main function of call control is to check the availability of network resources such as wavelengths and receivers at destination node. Bearer control is to reserve and assign wavelengths. The signaling architecture of this protocol consists of call controller and hearer controller The call controller handles call setup and release, activates the beater controller, and manages the status of call and bearer. The bearer controller reserves wavelengths, sets up bearer, tears down bearer. and notifies the status of beater to call controller. The state transition diagrams of each controller are designed. Using control messages and related primitives, the information flows for call setup and bearer setup, hearer teardown and call release, and reaction for setup failures are described to evaluate the performance. The simulation results show that the separated control signaling protocol is superior to conventional one in terms of call blocking probability and resource utilization.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.11
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• pp.1-11
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• 1997

The transient current components of the dRAM are analyzed and the sensing current, data path operation current and DC leakage current are revealed to be the major curretn components. It is expected that the supply voltage of less than 1.5V with low VT MOS witll be used in multi-giga bit dRAM. A low voltage dual VT self-timed CMOS logic in which the subthreshold leakage current path is blocked by a large high-VT MOS is proposed. An active signal at each node of the nature speeds up the signal propagation and enables the synchronous DRAM to adopt a fast pipelining scheme. The sensing current can be reduced by adopting 8 bit prefetch scheme with 1.2V VDD. Although the total cycle time for the sequential 8 bit read is the same as that of the 3.3V conventional DRAM, the sensing current is loered to 0.7mA or less than 2.3% of the current of 3.3V conventional DRAM. 4 stage pipeline scheme is used to rduce the power consumption in the 4 giga bit DRAM data path of which length and RC delay amount to 3 cm and 23.3ns, respectively. A simple wave pipeline scheme is used in the data path where 4 sequential data pulses of 5 ns width are concurrently transferred. With the reduction of the supply voltage from 3.3V to 1.2V, the operation current is lowered from 22mA to 2.5mA while the operation speed is enhanced more than 4 times with 6 ns cycle time.

• Journal of the Korea Society of Computer and Information
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• v.16 no.4
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• pp.111-117
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• 2011

In this paper, we propose an QoS aware multi-layer MAC(QAML-MAC) protocol in a wireless sensor networks. Since the proposed protocol is based on the sleep-awake architecture, which save node's energy to prolong the entire network lifetime. For this purpose the QAML-MAC first classifies incoming data according to their transmission urgency and then saves them. The protocol also adapts the cross-layer concept to re-arrange the order of transmission with the same destination. So the delay can be decreased, which can not be obtained with the previous related protocols. And high priority data such as real-time multimedia or critical value in the field monitoring applications can be transmitted quickly, Furthermore the proposed protocol has advantage of decreasing transmitted data collisions using multiple layers of idle listening when there is no high-priority data. So energy consumptions of sensor nodes can be saved and the network lifetime can be prolonged.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.6
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• pp.2111-2131
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• 2015

Tiered wireless sensor network is a network model of flexibility and robustness, which consists of the traditional resource-limited sensor nodes and the resource-abundant storage nodes. In such architecture, collected data from the sensor nodes are periodically submitted to the nearby storage nodes for archive purpose. When a query is requested, storage nodes also process the query and return qualified data as the result to the base station. The role of the storage nodes leads to an attack prone situation and leaves them more vulnerable in a hostile environment. If any of them is compromised, fake data may be injected into and/or qualified data may be discarded. And the base station would receive incorrect answers incurring malfunction to applications. In this paper, an efficient verifiable top-k query processing scheme called EVTQ is proposed, which is capable of verifying the authentication and completeness of the results. Collected data items with the embedded information of ordering and adjacent relationship through a hashed message authentication coding function, which serves as a validation code, are submitted from the sensor nodes to the storage nodes. Any injected or incomplete data in the returned result from a corresponded storage node is detected by the validation code at the base station. For saving communication cost, two optimized solutions that fuse and compress validation codes are presented. Experiments on communication cost show the proposed method is more efficiency than previous works.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.6
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• pp.608-616
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• 2001

This paper proposes a face recognition technique that effectively combines fixed graph matching (FGM) and Fisherface algorithm. EGM as one of dynamic link architecture uses not only face-shape but also the gray information of image, and Fisherface algorithm as a class specific method is robust about variations such as lighting direction and facial expression. In the proposed face recognition adopting the above two methods, linear projection per node of an image graph reduces dimensionality of labeled graph vector and provides a feature space to be used effectively for the classification. In comparison with a conventional EGM, the proposed approach could obtain satisfactory results in the perspectives of recognition speeds. Especially, we could get higher average recognition rate of 90.1% than the conventional methods by hold-out method for the experiments with the Yale Face Databases and Olivetti Research Laboratory (ORL) Databases.