• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2000년도 춘계학술대회논문집
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• pp.1589-1595
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• 2000

레이저 텍스쳐와 미케니칼 텍스쳐 컴퓨터 하드디스크의 마찰과 마코 매카니즘이 Contact Start/Stop test 실행후의 특성들에 대해 연구되었다. 다양한 분석적이고 기계적인 테스트 기술들이 이용되었다. 형상, 조도, 화학적 조성, 기계적 성질, CSS 로부터 기인된 코팅의 마찰특성들에 대해 그 변화들을 조사하였다. 즉, AFM(Atomic Force Microscopy), Nano-Indentation, Nano-Scratch, TOF-SIMS(Time of Flight Secondary Ion Mass Spectroscopy), AES(Auger Electronic Spectroscopy)등이 이 연구에 적용되었다. 레이저 텍스쳐 범프의 표면조도와 미케니칼 텍스쳐 지역의 표면조도는 각각 대략적으로 4nm 와 7nm 감소되었다. 탄성계수와 경도값은 CSS test후에 증가하였고 가장 바깥쪽의 코팅층의 변형강화가 생겨났다. 자성층과 Ni-P 층 사이에 점착성의 문제가 확인되었다. TOF-SIMS 분석은 C 와 $C_2F_5$의 세기에 있어서 감소를 드러냈고 이것은 코팅 표면에 윤활제 요소의 마모를 확실시 할수 있는 결과로 나타났다.

• Journal of the Optical Society of Korea
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• 제20권1호
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• pp.130-134
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• 2016

The influence of Au/Ni-based contact formed on a lightly-doped (7.3×1017cm−3, Zn-doped) InGaAsP layer for electrical compensation of surface plasmon polariton (SPP) propagation under various rapid thermal annealing (RTA) conditions has been studied. The active control of SPP propagation is realized by electrically pumping the InGaAsP multiple quantum wells (MQWs) beneath the metal planar waveguide. The metal planar film acts as the electric contact layer and SPP waveguide, simultaneously. The RTA process can lower the metal-semiconductor electric contact resistance. Nevertheless, it inevitably increases the contact interface morphological roughness, which is detrimental to SPP propagation. Based on this dilemma, in this work we focus on studying the influence of RTA conditions on electrical control of SPPs. The experimental results indicate that there is obvious degradation of electrical pumping compensation for SPP propagation loss in the devices annealed at 400℃ compared to those with no annealing treatment. With increasing annealing duration time, more significant degradation of the active performance is observed even under sufficient current injection. When the annealing temperature is set at 400℃ and the duration time approaches 60s, the SPP propagation is nearly no longer supported as the waveguide surface morphology is severely changed. It seems that eutectic mixture stemming from the RTA process significantly increases the metal film roughness and interferes with the SPP signal propagation.

• 대한치과보철학회지
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• 제29권2호
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• pp.85-101
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• 1991

The purpose of this study was to determine the optimum range of laser energy density to the enamel surface of permanent incisors when they are irradiated with the pulsed Nd : YAG laser, Laser impacts on each experimental group were made at energy density of $20\sim50J/cm^2$ by 20 pulses of the pulse width 1.2 msec. The author investigated the enamel surface with the sunning electron microscope(SEM) and the surface roughness tester, and measured the shear bond strength between electrolytically etched Ni-Cr-Be alloy casting and composite resin. The obtained results were as follows: 1. The surface roughness of enamel after laser irradiation showed the significant difference level from the energy density $40J/cm^2(P<0.05)$. 2. The mean shear bond strength of etched-metal resin-bonded specimens were $154.23{\pm}33.30kg/cm^2$ at unlased enamel surface and $195.72{\pm}29.56kg/cm^2$ at lased energy density $30J/cm^2$, and showed a significant difference(P<0.05). 8. SEM photographs showed the irregular microcracks and the structural changes of lased enamel surface. 4. SEM photographs of the fracture surface after testing the shear bond strength showed the aspect of interfacial fracture between bonding agent and composite resin at the metal sides.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.154-154
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• 2012

Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.479-479
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• 2011

Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

• 한국산학기술학회논문지
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• 제8권1호
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• pp.25-32
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• 2007

코발트 니켈 합금형 실리사이드 공정에서 단결정실리콘과 다결정실리콘 기판에 자연산화막이 있는 경우 나노급 두께의 코발트 니켈 합금 금속을 증착하고 실리사이드화하는 경우의 반응 안정성을 확인하였다. 4인치 P-type(100)Si 기판 전면에 poly silicon을 입힌 기판과 single silicon 상태의 두 종류 기판을 준비하고 두께 4 nm의 자연산화막이 있는 상태에서 10 nm 코발트 니켈 합금을 니켈의 상대조성을 $10{\sim}90%$로 달리하며 열증착하였다. 통상의 600, 700, 800, 900, 1000, $1100^{\circ}C$ 각 온도에서 실리사이드화 열처리를 시행 후 잔류 합금층을 제거하고, XRD(X-ray diffraction)및 FE-SEM(Field emission scanning electron microscopy), AES(Auger electron spectroscopy)를 사용하여 실리사이드가 생겼는지 확인하였다. 마이크로라만 분석기로 실리사이드 반응시의 실리콘 층의 잔류 스트레스도 확인하였다. 자연산화막이 존재하는 경우 실리사이드 반응이 진행되지 않았고, 폴리실리콘 기판과 고온에서는 금속과 산화층의 반응잔류물이 생성되었다. 단결정 기판의 고온열처리에서는 실리사이드 반응이 없더라도 핀홀이 발생할 수 있는 정도의 열스트레스가 존재하였다. 코발트 니켈 복합실리사이드 공정에서는 자연산화막을 제거하는 공정이 필수적이었다.