• Title/Summary/Keyword: Neural circuit

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Goosecoid Controls Neuroectoderm Specification via Dual Circuits of Direct Repression and Indirect Stimulation in Xenopus Embryos

  • Umair, Zobia;Kumar, Vijay;Goutam, Ravi Shankar;Kumar, Shiv;Lee, Unjoo;Kim, Jaebong
    • Molecules and Cells
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    • v.44 no.10
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    • pp.723-735
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    • 2021
  • Spemann organizer is a center of dorsal mesoderm and itself retains the mesoderm character, but it has a stimulatory role for neighboring ectoderm cells in becoming neuroectoderm in gastrula embryos. Goosecoid (Gsc) overexpression in ventral region promotes secondary axis formation including neural tissues, but the role of gsc in neural specification could be indirect. We examined the neural inhibitory and stimulatory roles of gsc in the same cell and neighboring cells contexts. In the animal cap explant system, Gsc overexpression inhibited expression of neural specific genes including foxd4l1.1, zic3, ncam, and neurod. Genome-wide chromatin immunoprecipitation sequencing (ChIP-seq) and promoter analysis of early neural genes of foxd4l1.1 and zic3 were performed to show that the neural inhibitory mode of gsc was direct. Site-directed mutagenesis and serially deleted construct studies of foxd4l1.1 promoter revealed that Gsc directly binds within the foxd4l1.1 promoter to repress its expression. Conjugation assay of animal cap explants was also performed to demonstrate an indirect neural stimulatory role for gsc. The genes for secretory molecules, Chordin and Noggin, were up-regulated in gsc injected cells with the neural fate only achieved in gsc uninjected neighboring cells. These experiments suggested that gsc regulates neuroectoderm formation negatively when expressed in the same cell and positively in neighboring cells via soluble factors. One is a direct suppressive circuit of neural genes in gsc expressing mesoderm cells and the other is an indirect stimulatory circuit for neurogenesis in neighboring ectoderm cells via secreted BMP antagonizers.

Implementation of artificial neural network with on-chip learning circuitry (학습 기능을 내장한 신경 회로망의 하드웨어 구현)

  • 최명렬
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.3
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    • pp.186-192
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    • 1996
  • A modified learning rule is introduced for the implementation of feedforward artificial neural networks with on-chip learning circuitry using standard analog CMOS technology. Learning rule, is modified form the EBP (error back propagation) rule which is one of the well-known learning rules for the feedforward rtificial neural nets(FANNs). The employed MEBP ( modified EBP) rule is well - suited for the hardware implementation of FANNs with on-chip learning rule. As a ynapse circuit, a four-quadrant vector-product linear multiplier is employed, whose input/output signals are given with voltage units. Two $2{\times}2{\times}1$ FANNs are implemented with the learning circuitry. The implemented FANN circuits have been simulatied with learning test patterns using the PSPICE circuit simulator and their results show correct learning functions.

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Static Switch Controller Based on Artificial Neural Network in Micro-Grid Systems

  • Saeedimoghadam, Mojtaba;Moazzami, Majid;Nabavi, Seyed. M.H.;Dehghani, Majid
    • Journal of Electrical Engineering and Technology
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    • v.9 no.6
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    • pp.1822-1831
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    • 2014
  • Micro-grid is connected to the main power grid through a static switch. One of the critical issues in micro-grids is protection which must disconnect the micro-grid from the network in short-circuit contingencies. Protective methods of micro-grid mainly follow the model of distribution system protection. This protection scheme suffers from improper operation due to the presence of single-phase loads, imbalance of three-phase loads and occurrence of power swings in micro-grid. In this paper, a new method which prevents from improper performance of static micro-grid protection is proposed. This method works based on artificial neural network (ANN) and able to differentiate short circuit from power swings by measuring impedance and the rate of impedance variations in PCC bus. This new technique provides a protective system with higher reliability.

Neural Circuit and Mechanism of Fear Conditioning (공포 조건화 학습의 신경회로와 기전)

  • Choi, Kwang-Yeon
    • Korean Journal of Biological Psychiatry
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    • v.18 no.2
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    • pp.80-89
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    • 2011
  • Pavlovian fear conditioning has been extensively studied for the understanding of neurobiological basis of memory and emotion. Pavlovian fear conditioning is an associative memory which forms when conditioned stimulus (CS) is paired with unconditioned stimulus (US) once or repeatedly. This behavioral model is also important for the understanding of anxiety disorders such as posttraumatic stress disorder. Here we describe the neural circuitry involved in fear conditioning and the molecular mechanisms underlying fear memory formation. During consolidation some memories fade out but other memories become stable and concrete. Emotion plays an important role in determining which memories will survive. Memory becomes unstable and editable again immediately after retrieval. It opens the possibility for us of modulating the established fear memory. It provides us with very efficient tools to improve the efficacy of cognitive-behavior therapy and other exposure-based therapy treating anxiety disorders.

A model for neural trigger circuit using AlGaAs/GaAs MQW-IMD (AlGaAs/GaAs MQW-IMD를 사용하는 신경구동회로의 모델)

  • Song, Chung-Kun
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.4
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    • pp.47-56
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    • 1995
  • In this paper the model of the MQE-IMD-based neural trigger circuit is improved, where MQW-IMD is a new semiconductor device proposed and experimentally demonstrated by the author for the hardware implementation of the neural networks. The electron energy of AlXGa1-XAsbarrier is calculated by Ensemble Monte Carlo simulation according to the variation of Al mole fraction x and the applied electric field, whtich had been roughly estimated in the previous paper because of the difficulty to get the data. And in the consideration of the tunneling of the confined electrons within the quantum well the accuracy of the impact ionization rate is enhaned. Finally, the dependance of the frequency of pulse-train on the number of quantum wells can be calculated by modelling the effect of the distance of the induced positive charge from the cathode on the electric field at the cathode.

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A Study on Optimal Layout of Two-Dimensional Rectangular Shapes Using Neural Network (신경회로망을 이용한 직사각형의 최적배치에 관한 연구)

  • 한국찬;나석주
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.17 no.12
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    • pp.3063-3072
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    • 1993
  • The layout is an important and difficult problem in industrial applications like sheet metal manufacturing, garment making, circuit layout, plant layout, and land development. The module layout problem is known to be non-deterministic polynomial time complete(NP-complete). To efficiently find an optimal layout from a large number of candidate layout configuration a heuristic algorithm could be used. In recent years, a number of researchers have investigated the combinatorial optimization problems by using neural network principles such as traveling salesman problem, placement and routing in circuit design. This paper describes the application of Self-organizing Feature Maps(SOM) of the Kohonen network and Simulated Annealing Algorithm(SAA) to the layout problem of the two-dimensional rectangular shapes.

Development of Process Analysis and Prediction Systeme to Improve Yield in Plasma Etching Process Using Adaptively Trained Neural Network (적응 훈련 신경망을 이용한 플라즈마 식각 공정 수율 향상을 위한 공정 분석 및예측 시스템 개발)

  • Choi, Mun-Kyu;Kim, Hun-Mo
    • Journal of the Korean Society for Precision Engineering
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    • v.16 no.11
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    • pp.98-105
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    • 1999
  • As the IC(Integrated Circuit) has been densified and complicated, it is required to thorough process control to improve yield. Experts, for this purpose, focused on the process analysis automation, which is came from the strict data management in semiconductor manufacturing. In this paper, we presents the process analysis system that can analyze causes, for a output after processes. Also, the plasma etching process that highly affects yield among semiconductor process is modeled to predict a output before the process. To approach this problem, we use adaptively trained neural networks that exhibit superior accuracy over statistical techniques. And in comparison with methods in other paper, a method that history of trend for input data is considered is shown to offer advantage in both learning and prediction capability. This research regards CD(Critical Dimension) that is considerable in high integrated circuit as output variable of the prediction model.

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The Discrimination of Fault Type by Unsupervised Neural Network (자율 학습 신경회로망을 이용한 고장상 선은 알고리즘)

  • Lee Jae Wook;Choi Chang Yeol;Jang Byung Tae;Lee Myung Hee;No Jang Hyun
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.384-387
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    • 2004
  • The direction and the type of a fault on a transmission line need to be identified rapidly and correctly, The work described in this paper addresses the problem encountered by a conventional algorithm in a fault type classification in double circuit line, this arises due to a mutual coupling and CT saturation under the fault condition. We present an approach to identify fault type with novel neural network on double circuit transmission line. The neural network based on combined unsupervised training method provides the ability classify the fault type by different patterns of the associated voltages and currents.

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A study on the fault diagnosis in the power system using Neural Network (신경회로망을 이용한 전력계통의 고장진단에 관한 연구)

  • Park, June-Ho;Choi, June-Hyug;Lee, K.J.
    • Proceedings of the KIEE Conference
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    • 1991.11a
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    • pp.43-46
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    • 1991
  • When a fault is occurred in Power System, relay system detect overcurrent or voltage drop and trip the circuit breaker. Then, an operator in the control room diagnoses the fault and start the recovery of the system after analyzing the alarm information of relays or circuit breakers. The alarm informations have different patterns for each fault of the electric equipments on lines in power systems. In this paper, Back propagation algorithm is applied to train for many kinds of the fault in the power system. The simulation results show the possibility of the neural network application for the fault diagnosis in the case of errorous operation as well as normal operation of relays or circuit breakers.

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A study on implementation digital programmable CNN with variable template memory (가변적 템플릿 메모리를 갖는 디지털 프로그래머블 CNN 구현에 관한 연구)

  • 윤유권;문성룡
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.10
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    • pp.59-66
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    • 1997
  • Neural networks has widely been be used for several practical applications such as speech, image processing, and pattern recognition. Thus, a approach to the voltage-controlled current source in areas of neural networks, the key features of CNN in locally connected only to its netighbors. Because the architecture of the interconnection elements between cells in very simple and space invariant, CNNs are suitable for VLSI implementation. In this paper, processing element of digital programmable CNN with variable template memory was implemented using CMOS circuit. CNN PE circuit was designe dto control gain for obtaining the optimal solutions in the CNN output. Performance of operation for 4*4 CNN circuit applied for fixed template and variable template analyzed with the result of simulation using HSPICE tool. As a result of simulations, the proposed variable template method verified to improve performance of operation in comparison with the fixed template method.

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