• Title/Summary/Keyword: Negative Impedance Converter

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Equivalent Parallel Capacitance Cancellation of Common Mode Chokes Using Negative Impedance Converter for Common Mode Noise Reduction

  • Dong, Guangdong;Zhang, Fanghua
    • Journal of Power Electronics
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    • v.19 no.5
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    • pp.1326-1335
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    • 2019
  • Common mode (CM) chokes are a crucial part in EMI filters for mitigating the electromagnetic interference (EMI) of switched-mode power supplies (SMPS) and for meeting electromagnetic compatibility standards. However, the parasitic capacitances of a CM choke deteriorate its high frequency filtering performance, which results in increases in the design cycle and cost of EMI filters. Therefore, this paper introduces a negative capacitance generated by a negative impedance converter (NIC) to cancel the influence of equivalent parallel capacitance (EPC). In this paper, based on a CM choke equivalent circuit, the EPCs of CM choke windings are accurately calculated by measuring their impedance. The negative capacitance is designed quantitatively and the EPC cancellation mechanisms are analyzed. The impedance of the CM choke in parallel with negative capacitances is tested and compared with the original CM choke using an impedance analyzer. Moreover, a CL type CM filter is added to a fabricated NIC prototype, and the insertion loss of the prototype is measured to verify the cancellation effect. The prototype is applied to a power converter to test the CM conducted noise. Both small signal and EMI measurement results show that the proposed technique can effectively cancel the EPCs and improve the CM filter's high frequency filtering performance.

Negative Impedance Converter IC for Non-Foster Matching (비 포스터 정합을 위한 부성 임피던스 변환기 집적회로)

  • Park, Hongjong;Lee, Sangho;Park, Sunghwan;Kwon, Youngwoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.283-291
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    • 2015
  • In this paper, a negative impedance converter, the key element of non-Foster matching to enhance the bandwidth of matching high Q-factor passive element, is presented. Proposed negative impedance converter is implemented by the topology of Linvill's transistor negative impedance converter circuit. It is hard to forecast the operation of negative impedance circuit, because it is composed of gain element and positive feedback. Therefore the negative impedance circuit is implemented by hybrid type beforehand to check out the feasibility and it is designed by integrated circuit. The integrated circuit is fabricated by commercial $0.18{\mu}m$ SiGe BiCMOS process, and non-Foster matching is observed at 700~960 MHz band by cancelling the target reactance.

Characteristics Control of a Thickness Mode Piezoelectric Vibrator Using a Negative Impedance Converter Circuit (부임피던스 변환회로를 이용한 두께 모드 압전 진동자의 특성제어)

  • 황성필;김무준;하강열
    • The Journal of the Acoustical Society of Korea
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    • v.21 no.7
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    • pp.600-605
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    • 2002
  • In this paper, a Negative Impedance Converter (NIC) circuit was employed for the electro-mechanical characteristic control of a thickness mode piezoelectric vibrator. Two circular plane piezoelectric vibrators were bonded together and the NIC circuit was connected to one of the vibrators. The theoretical and experimental analysis of the characteristics shown that the quality factor and the electro-acoustic efficiency of the vibrator with the NIC circuit could be improved by 20 times and 2.5 times, respectively.

Mitigation of Negative Impedance Instabilities in a DC/DC Buck-Boost Converter with Composite Load

  • Singh, Suresh;Rathore, Nupur;Fulwani, Deepak
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1046-1055
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    • 2016
  • A controller to mitigate the destabilizing effect of constant power load (CPL) is proposed for a DC/DC buck-boost converter. The load profile has been considered to be predominantly of CPL type. The negative incremental resistance of the CPL tends to destabilize the feeder system, which may be an input filter or another DC/DC converter. The proposed sliding mode controller aims to ensure system stability under the dominance of CPL. The effectiveness of the controller has been validated through real-time simulation studies and experiments under various operating conditions. The controller has been demonstrated to be robust with respect to variations in supply voltage and load and capable of mitigating instabilities induced by CPL. Furthermore, the controller has been validated using all possible load profiles, which may arise in modern-day DC-distributed power systems.

A Study of the Active Resonance Damper for a DC Distributed Power System with Parallel Pulsed Power Loads (병렬펄스부하를 갖는 직류배전시스템을 위한 능동 공진 댐퍼에 대한 연구)

  • La, Jae-Du;Lee, Byung-Hun;Chang, Han-Sol;Woo, Hyun-Min;Kim, Young-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.9
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    • pp.1289-1295
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    • 2012
  • An active resonance damper for a DC Distributed Power System(DPS) with parallel loads is presented. Each pulse power load in a DC DPS comprises both a resistive power load and a step-up converter. The step-up converter behave as constant power load(CPL) when tightly regulated and usually cause a negative impedance instability problem. Furthermore, when an input filter is connected to a large constant power load, the instability of DC bus voltage. In this paper, a bidirectional DC/DC converter with a reduced storage capacitor quantitatively are proposed as a active resonance damper, to mitigate the voltage instability on the bus. The validity of the proposed method was confirmed by simulation and experimental works.

Improvement of Power Transfer Efficiency Using Negative Impedance Converter for Wireless Power Transfer System with Magnetic Resonant Coupling (부성 임피던스 변환기를 적용한 자기공명 방식 무선전력전송 시스템의 효율 개선)

  • Yoon, Se-Hwa;Kim, Tae-Hyung;Park, Jin-Kwan;Kim, Seong-Tae;Yun, Gi-Ho;Yook, Jong-Gwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.12
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    • pp.933-940
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    • 2017
  • A wireless power transfer system with a negative impedance converter(NIC) was designed and tested. The system was investigated to identify the effects of ferrites and conductors. To improve the power transfer efficiency(PTE), the Q-factor of the transmitter was enhanced by the negative resistance generated by the NIC. The NIC was composed of an Op-Amp and resistors. The negative resistance was obtained with respect to a resistor connected in a feedback loop. The dimension of the Tx coil was $250mm{\times}250mm{\times}0.8mm$. The impedance and Q-factor were $31+j1874{\Omega}$ and 60, respectively. The negative resistance was selected to be $30{\Omega}$, and the Q-factor was increased to 900 by reduction of the transmitter resistance, which was about 15 times higher than that of a conventional transmitter. The measured PTE was greatly improved in comparison to that of a conventional system. These results demonstrate that the PTE is enhanced by using the NIC.

Signal-to-noise Ratio Improvement of a FM Antenna Using a Non-Foster Circuit (Non-Foster 회로를 이용한 FM 안테나의 신호 대 잡음비 개선)

  • Park, Hongwoo;Kahng, Sungtek;Kim, Hongjoon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.2
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    • pp.329-334
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    • 2016
  • In this paper, we demonstrate a Non-Foster matching method for an electrically small antenna to improve the signal-to-noise ratio (SNR) of communication link. For the experiment, we used a general FM antenna whose resonance frequency is about 52-57 MHz and a floating type Linvill negative impedance converter(NIC)-based circuit as a Non-Foster matching element. By implementing the Non-Foster circuit to cover FM band, we can achieve a wide bandwidth matching covers 40-200 MHz. Our measurement shows 3-7 dB improvement of SNR for the same bandwidth though there are several spikes which means no improvement of SNR in the band.

NIC-Based Non-Foster Impedance Matching of a Resistively Loaded Vee Dipole Antenna (네거티브 임피던스 변환기에 기반을 둔 저항성 V 다이폴 안테나의 논 포스터 임피던스 매칭)

  • Yang, Hyemin;Kim, Kangwook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.7
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    • pp.597-605
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    • 2015
  • Negative impedance converter(NIC)-based non-Foster impedance matching is proposed for an electrically small antenna. The antenna considered in this work is a resistively loaded vee dipole(RVD) antenna, which has considerable reflection at the feed point because of its large negative input reactance. The non-Foster matching circuit built near the feed point consists of two-stage NIC circuit and a capacitor connected between the stages. The NIC is realized by using operational amplifiers(op-amps) and resistors. The circuit is designed by considering of the input impedance according to the finite open-loop gain of the practical NICs. The stability test of the impedance-matched RVD antenna is performed. The non- Foster matching circuit is implemented with the RVD antenna. The measured impedance demonstrates that the proposed non-Foster matching circuit effectively reduces the input reactance of the RVD antenna.

A $120-dB{\Omega}$ 8-Gb/s CMOS Optical Receiver Using Analog Adaptive Equalizer (아날로그 어댑티브 이퀄라이저를 이용한 $120-dB{\Omega}$ 8-Gb/s CMOS 광 수신기)

  • Lee, Dong-Myung;Choi, Boo-Young;Han, Jung-Won;Han, Gun-Hee;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.119-124
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    • 2008
  • Transimpedance amplifier(TIA) is the most significant element to determine the performance of the optical receiver, and thus the TIA must satisfy tile design requirements of high gain and wide bandwidth. In f)is paper, we propose a novel single chip optical receiver that exploits an analog adaptive equalizer and a limiting amplifier to enhance the gain and bandwidth performance, respectively. The proposed optical receiver is designed by using a $0.13{\mu}m$ CMOS process and its post-layout simulations show $120dB{\Omgea}$ transimpedance gain and 5.88GHz bandwidth. The chip core occupies the area of $0.088mm^2$, due to utilizing the negative impedance converter circuit rather than using on-chip passive inductors.

Non-Foster Matching Circuit for Wideband Anti-Jamming Small GPS Antennas (광대역 항재밍 소형 GPS 안테나용 비 포스터 정합회로)

  • Ha, Sang-Gyu;Jung, Kyung-Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.12
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    • pp.1112-1115
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    • 2016
  • Global Positioning System(GPS) is a useful system used in both civilian and military applications. However, the signal of GPS is susceptible to jamming attacks due to low receive sensitivity, since the signals come from the satellite located at over 20,000 km above the earth. In this paper, we have conducted a preceding research on a non-Foster matching circuit that efficiently matches an electrically ultra-small GPS antenna. Electrically Small Antennas(ESAs) are inefficient radiators and are difficult to match in wideband due to extremely high quality factor. In order to match small GPS antenna in wideband, a non-Foster matching circuit for a small GPS antenna was designed. A negative impedance converter circuit consisting of Linvill's cross-coupled pair transistors was fabricated and its stability was verified by the time-domain stability analysis. In addition, anechoic chamber measurements show that the non-Foster matching circuit for small GPS antenna can lead bore-sight gain improvement by more than 17 dB.