• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.3
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• pp.245-248
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• 2020

The wettability of silicon carbide (SiC) crystal, which has 6H-SiC and 4H-SiC regions prepared using the physical vapor transport (PVT) method, is quantitatively analyzed using dispensed deionized (DI) water droplets. Regardless of the polytypes in SiC, the average of five contact angle measurements showed a difference of about 6° between the Si-face and C-face. The contact angle on the Si-face (C-face) is measured after the removal of the native oxide using BOE (6:1), and revealed a significant decrease of the contact angle from 74.9° (68.4°) to 47.7° (49.3°) and from 75.8° (70.2°) to 51.6° (49.5°) for the 4H-SiC and 6H-SiC regions, respectively. The contact angle of the Si-face recovered over time during room temperature oxidation in air; in contrast, that of the C-face did not recover to the initial value. This study shows that the contact angle is very sensitive to SiC surface polarity, specific surface conditions, and process time. Contact angle measurements are expected to be a rapid way of determining the surface polarity and wettability of SiC crystals.

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.64.2-65
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• 2003

A 4 nm layer of ZrOx (targeted x-2) was deposited on an interfacial layer(IL) of native oxide (SiO, t∼1.2 nm) surface on 200 mm Si wafers by a manufacturable atomic layer chemical vapor deposition technique at 30$0^{\circ}C$. Some as-deposited layers were subjected to a post-deposition, rapid thermal annealing at $700^{\circ}C$ for 5 min in flowing oxygen at atmospheric pressure. The experimental x-ray diffraction, x-ray photoelectron spectroscopy, high-resolution transmission electron microscopy, and high-resolution parallel electron energy loss spectroscopy results showed that a multiphase and heterogeneous structure evolved, which we call the Zr-O/IL/Si stack. The as-deposited Zr-O layer was amorphous $ZrO_2$-rich Zr silicate containing about 15% by volume of embedded $ZrO_2$ nanocrystals, which transformed to a glass nanoceramic (with over 90% by volume of predominantly tetragonal-$ZrO_2$(t-$ZrO_2$) and monoclinic-$ZrO_2$(m-$ZrO_2$) nanocrystals) upon annealing. The formation of disordered amorphous regions within some of the nanocrystals, as well as crystalline regions with defects, probably gave rise to lattice strains and deformations. The interfacial layer (IL) was partitioned into an upper Si $o_2$-rich Zr silicate and the lower $SiO_{x}$. The latter was sub-toichiometric and the average oxidation state increased from Si0.86$^{＋}$ in $SiO_{0.43}$ (as-deposited) to Si1.32$^{＋}$ in $SiO_{0.66}$ (annealed). This high oxygen deficiency in $SiO_{x}$ indicative of the low mobility of oxidizing specie in the Zr-O layer. The stacks were characterized for their dielectric properties in the Pt/{Zr-O/IL}/Si metal oxide-semiconductor capacitor(MOSCAP) configuration. The measured equivalent oxide thickness (EOT) was not consistent with the calculated EOT using a bilayer model of $ZrO_2$ and $SiO_2$, and the capacitance in accumulation (and therefore, EOT and kZr-O) was frequency dispersive, trends well documented in literature. This behavior is qualitatively explained in terms of the multi-layer nanostructure and nanochemistry that evolves.ves.ves.

• Korean Journal of Materials Research
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• v.14 no.6
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• pp.402-406
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• 2004

$WSi_2$, $TiSi_2$, $CoSi_2$, and $TaSi_2$ are general silicides used today in semiconductor devices. $WSi_2$ thin films have been proposed, studied and used recently in CMOS technology extensively to reduce sheet resistance of polysilicon and $n^{+}$ region. However, there are several serious problems encountered because $WSi_2$ is oxidized and forms a native oxide layer at the interface between $WSi_2$ and $Si_3$$N_4$. In this study, we have introduced 20 $slm-N_2$ gas from top to bottom of the furnace in order to control native oxide films between $WSi_2$ and $Si_3$$N_4$ film. In resulting SEM photographs, we have observed that the native oxide films at the surface of $WSi_2$ film are removed using the long injector system.

• Proceedings of the Korean Vacuum Society Conference
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• 1993.02a
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• pp.29-31
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• 1993

NH3-pplasma treatment has been used for ppassivation of native-oxide-contaminated GaAs surface. Ex-situ band-gapp pphotoluminescence(ppL) measurement shows enhanced intensity for the treated surfaces. Auger electron sppectroscoppy(AES) shows that the treated surface contains nitrogen atoms but no arsenic atoms, which leads us to sppeculate that the graded GaN thin layer was formed on the surface. Based on these results, new metal-insulator-GaAs structure is ppropposed.

• Journal of Electrical Engineering and information Science
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• v.3 no.1
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• pp.110-116
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• 1998

A single-crystalline epitaxial film of GaAs has been grown on Si using a gs assisted-ionized vapour beam eptaxial technique. The native oxide layer on the silicon substrate was removed at 550$^{\circ}C$ by use of an accelerated arsenic ion beam, instead of a high-temperature desorption. During the growth the substrate temperature was maintained at 550$^{\circ}C$. Transmission electron microscopy and electron diffraction data suggest that the GaAs layer is an epitaxially grown single-crystalline layer. The possibility of growing device quality GaAs on Si is able demonstrated through fabrication of GaAs MODFET on Si substrates.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.250-253
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• 1990

A single-crystalline epitaxial film of GaAs has been grown on Si using an ionized cluster beam technique. The native oxide layer on the silicon substrate was removed at $550^{\circ}C$ by use of an accelerated arsonic ion beam, instead of a high-temperature desorption. During the growth the substrate temperature was maintained at $550^{\circ}C$. Transmission electron microscopy and electron diffraction data suggest that the eats layer is an epitaxially grown single-crystalline layer.

• Korean Journal of Materials Research
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• v.24 no.12
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• pp.682-688
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• 2014

Physical and chemical changes in a polished wafer and in $2.5{\mu}m$ & $4{\mu}m$ epitaxially grown Si layer wafers (Epilayer wafer) after surface treatment were investigated. We characterized the influence of surface treatment on wafer properties such as surface roughness and the chemical composition and bonds. After each surface treatment, the physical change of the wafer surface was evaluated by atomic force microscopy to confirm the surface morphology and roughness. In addition, chemical changes in the wafer surface were studied by X-ray photoemission spectroscopy measurement. Changes in the chemical composition were confirmed before and after the surface treatment. By combined analysis of the physical and chemical changes, we found that diluted hydrofluoric acid treatment is more effective than buffered oxide etching for $SiO_2$ removal in both polished and Epi-Layer wafers; however, the etch rate and the surface roughness in the given treatment are different among the polished $2.5{\mu}m$ and $4{\mu}m$ Epi-layer wafers in spite of the identical bulk structural properties of these wafers. This study therefore suggests that independent surface treatment optimization is required for each wafer type, $2.5{\mu}m$ and $4{\mu}m$, due to the meaningful differences in the initial surface chemical and physical properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.183-184
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• 2013

Two main MBE growth techniques have been used: plasma-assisted MBE (PA-MBE), which utilizes a rf plasma to supply active nitrogen, and ammonia MBE, in which nitrogen is supplied by pyrolysis of NH3 on the sample surface during growth. PA-MBE is typically performed under metal-rich growth conditions, which results in the formation of gallium droplets on the sample surface and a narrow range of conditions for optimal growth. In contrast, high-quality GaN films can be grown by ammonia MBE under an excess nitrogen flux, which in principle should result in improved device uniformity due to the elimination of droplets and wider range of stable growth conditions. A drawback of ammonia MBE, on the other hand, is a serious memory effect of NH3 condensed on the cryo-panels and the vicinity of heaters, which ruins the control of critical growth stages, i.e. the native oxide desorption and the surface reconstruction, and the accurate control of V/III ratio, especially in the initial stage of seed layer growth. In this paper, we demonstrate that the reliable and reproducible growth of GaN on Si (110) substrates is successfully achieved by combining two MBE growth technologies using rf plasma and ammonia and setting a proper growth protocol. Samples were grown in a MBE system equipped with both a nitrogen rf plasma source (SVT) and an ammonia source. The ammonia gas purity was ＞99.9999% and further purified by using a getter filter. The custom-made injector designed to focus the ammonia flux onto the substrate was used for the gas delivery, while aluminum and gallium were provided via conventional effusion cells. The growth sequence to minimize the residual ammonia and subsequent memory effects is the following: (1) Native oxides are desorbed at $750^{\circ}C$ (Fig. (a) for [$1^-10$] and [001] azimuth) (2) 40 nm thick AlN is first grown using nitrogen rf plasma source at $900^{\circ}C$ nder the optimized condition to maintain the layer by layer growth of AlN buffer layer and slightly Al-rich condition. (Fig. (b)) (3) After switching to ammonia source, GaN growth is initiated with different V/III ratio and temperature conditions. A streaky RHEED pattern with an appearance of a weak ($2{\times}2$) reconstruction characteristic of Ga-polarity is observed all along the growth of subsequent GaN layer under optimized conditions. (Fig. (c)) The structural properties as well as dislocation densities as a function of growth conditions have been investigated using symmetrical and asymmetrical x-ray rocking curves. The electrical characteristics as a function of buffer and GaN layer growth conditions as well as the growth sequence will be also discussed. Figure: (a) RHEED pattern after oxide desorption (b) after 40 nm thick AlN growth using nitrogen rf plasma source and (c) after 600 nm thick GaN growth using ammonia source for (upper) [110] and (lower) [001] azimuth.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.351-354
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• 2004

This work presents a simple and cost-effective approach for maskless fabrication of positive-tone silicon master for the replica molding of hyperfine elastomeric channel. Positive-tone silicon masters were fabricated by a maskless fabrication technique using the combination of nanoscratch by Nanoindenter ⓡ XP and XOH wet etching. Grooves were machined on a silicon surface coated with native oxide by ductile-regime nanoscratch, and they were etched in a 20 wt％ KOH solution. After the KOH etching process, positive-tone structures resulted because of the etch-mask effect of the amorphous oxide layer generated by nanoscratch. The size and shape of the positive-tone structures were controlled by varying the etching time (5, 15, 18, 20, 25, 30 min) and the normal loads (1, 5 mN) during nanoscratch. Moreover, the effects of the Berkovich tip alignment (0, 45$^{\circ}$) on the deformation behavior and etching characteristic of silicon material were investigated.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.05a
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• pp.40-44
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• 2002

The motivation of this work is to use SAM(Self-Assembled Monolayer) for developing a rapid and flexible non-photolithographic nano-structure fabrication technique which can be utilized in micro-machining of metals as well as silicon-based materials. The fabrication technique implemented in this work consists of a two-step process, namely, mechanical scribing followed by chemical etching. From the experimental results, it was found that thiol on copper surface could be removed even under a few nN normal load. The nano-tribological characteristics of thiol-SAM on various metals were largely dependent on the native oxide layer of metals. Based on these findings, nano-patterns with sub-micrometer width and depth on metal surfaces such as Cu, Au and Ag could be obtained using a diamond-coated tip.