• East Asian mathematical journal
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• v.25 no.3
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• pp.263-277
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• 2009

In this paper, we conduct a questionnaire survey on the actual conditions and the test on the basic scholastic ability of the students who register for the course, Introduction of Business Mathematics. We want to find the ways to improve the teaching-learning methods for this course. Especially, the registered students have difficulties in the following the course because they have not studied Calculus in their high school. So we give them several assignments on the Webwork system, an internet based homework management system, and analyze its effect on the students' scholastic achievement. And we propose a teaching-learning method suitable for the course.

• Journal of Sensor Science and Technology
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• v.33 no.3
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• pp.134-138
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• 2024

In this study, we propose a ternary D flip-flop using tristate ternary inverters for an energy-efficient ternary circuit design of sequential logic. The tristate ternary inverter is designed by adding the functionality of the transmission gate to a standard ternary inverter without an additional transistor. The proposed flip-flop uses 18.18% fewer transistors than conventional flip-flops do. To verify the advancement of the proposed circuit, we conducted an HSPICE simulation with CMOS 28 nm technology and 0.9 V supply voltage. The simulation results demonstrate that the proposed flip-flop is better than the conventional flip-flop in terms of energy efficiency. The power consumption and worst delay are improved by 11.34% and 28.22%, respectively. The power-delay product improved by 36.35%. The above simulation results show that the proposed design can expand the Pareto frontier of a ternary flip-flop in terms of energy consumption. We expect that the proposed ternary flip-flop will contribute to the development of energy-efficient sensor systems, such as ternary successive approximation register analog-to-digital converters.

• Proceedings of the Korea Information Processing Society Conference
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• 2015.10a
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• pp.164-165
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• 2015

고성능 복수 연산 처리 장치를 갖는 VLIW (Very Long Instruction Word)와 같은 프로세서 아키텍처는 정밀한 명령어 스케쥴링을 하드웨어가 아닌 소프트웨어가 처리해 주어야 한다. 통상 컴파일러가 하드웨어의 풍부한 자원을 충분히 활용할 수 있도록 이러한 기능을 수행하여 준다. 기존에 다양한 명령어 스케쥴링 알고리즘이 연구되었고 수 십년에 걸쳐 새로운 스케쥴링 기법들이 소개되었다. 이러한 스케쥴링 기법의 성능은 알고리즘의 효율뿐만 아니라 프로그램 코드에 내재된 의존관계 (dependence relation)의 복잡도에 따라 상당한 영향을 받는다. 본 연구에서는 의존도 완화기법으로서 레지스터 재할당 (register reallocation) 기법을 살펴보고 이를 활용하여 스케쥴링 성능 개선을 시도하여 보았다.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.2
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• pp.333-340
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• 2018

This paper introduces a BCH code decoder using parallel CRC(: Cyclic Redundancy Check) generation. Using a conventional parallel syndrome generator with a LFSR(: Linear Feedback Shift Register), it takes up a lot of space for a short code. The proposed decoder uses the parallel CRC method that is widely used to compute the checksum. This scheme optimizes the a syndrome generator in the decoder by eliminating redundant xor operation compared with the parallel LFSR and thus minimizes chip area and propagation delay. In simulation results, the proposed decoder has accomplished propagation delay reduction of 2.01 ns as compared to the conventional scheme. The proposed decoder has been designed and synthesized in $0.35-{\mu}m$ CMOS process.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.19 no.7
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• pp.89-97
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• 2020

Container vessels continue to grow in size, led by global shipowner. Large ships can be loaded more cargo at a time, reducing the cost of transportation per teu. this eventually leads to economies of sale, in which the production cost per unit decreases with increasing output. in accordance with the 70th Convention of the Marine Environment Protection Committee of the International Maritime Organization, as of January 1, 2020, MARPOL Annex VI Regulation 14.1.3 will be effective. All vessels must be meet these criteria to reduce Sox emissions and reduce NOx emissions by reducing the content of manned sulfur oxides from 3.5% to less than 0.5%, otherwise IACS Member States Entry to the port is denied. in order to do that need to LNG storage tank. in this study characteristic of the material after line heating (600℃,700℃,800℃,900℃) of 9% Ni steel used in the manufacture of LNG fuel tank of ship were verified using by mechanical test. In the heating method by line heating. The initial properties of steel are changed by variables such as temperature, time, speed. The experimental data of line heating presented in this paper confirmed that the initial change of 9% Ni steel could be minimized.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.592-595
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• 2008

This paper presents development of automatic image quality register optimization system using mobile TFT-LCD (Thin Film Transistor-Liquid Crystal Display) driver IC and embedded software. It optimizes automatically gamma adjustment and voltage setting registers in mobile TFT-LCD driver IC to improve gamma correction error, adjusting time, flicker noise and contrast ratio. Developed algorithms and embedded software are generally applicable for most of the TFT-LCD modules. The proposed optimization system contains module-under-test (MUT, TFT-LCD module), control program, multimedia display tester for measuring luminance, flicker noise and contrast ratio, and control board for interface between PC and TFT-LCD module. The control board is designed with DSP and FPGA, and it supports various interfaces such as RGB and CPU.

• Journal of IKEEE
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• v.24 no.3
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• pp.719-726
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• 2020

A threshold-voltage sensing circuit is proposed to compensate for pixel aging in active matrix organic light-emitting diodes. The proposed threshold-voltage sensing circuit consists of sample-hold (S/H) circuits and a single-ended successive approximation register (SAR) analog-to-digital converter (ADC) with a resolution of 10 bits. To remove a scale down converter of each S/H circuit and a voltage gain amplifier with a signl-to-differentail converter, the middle reference voltage calibration and input range calibration for the single-ended SAR ADC are performed in the capacitor digital-to-analog converter and reference driver. The proposed threshold-voltage sensing circuit is designed by using a 180-nm CMOS process with a supply voltage of 1.8 V. The ENOB and power consimption of the single-ended SAR ADC are 9.425 bit and 2.83 mW, respectively.

• Journal of Korean Society of Archives and Records Management
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• v.11 no.2
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• pp.121-142
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• 2011

The amount of audio-visual records production is growing rapidly and its formats are various. However, the audio-visual records are hardly managed and transferred. There are four different problems for checking how to transfer and manage audio-visual records of the central government: production and register, management and utilization, transfer, and dedicated program management. For solving these problems, the study proposes the development of process tools for audio-visual records, such as dedicated processes and S/W; the standardization of audio-visual records' management; the changes of audio-visual records officer's recognition; the need to educate dedicated audio-visual records managers; the recruitment of professionals dedicated to audio-visual records in the National Archives of Korea. Additionally, it is necessary to make an effort into practical use and preservation of audio-visual records.

• Journal of the Society of Naval Architects of Korea
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• v.53 no.6
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• pp.503-513
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• 2016

In order to reduce the green-house gas exhaustion, International Maritime Organization (IMO) has been reinforcing carbon gas regulations. Due to the regulations, a lot of competitions for designing Eco ship in the shipbuilding industry are progressing now. It is faced with the necessity of reducing hull weight by combining automated systems for optimal compartment arrangement with hull structural design. Most researches on optimum structural design method have been consistently in progress and applied to minimize weight and cost of mid-ship section in preliminary ship design stage based on analytical structural analysis method on fixed compartment arrangement. In order to reduce design period and to improve international technical competitiveness by shortening the period of hull structural design and enhancing design accuracy, it has been felt necessity to combine optimized compartment arrangement with optimum design of ship structure based on the international regulations and rules. So in this study, the automated design algorithm for longitudinal members has been developed to combine automated algorithm of compartment arrangement with hull structural design system for oil tanker. The SeaTrust-Hullscan software developed by Korean Register is used to perform ship structural design for mother ship and selected design cases. The effect of weight reduction is verified with comparison of ship weight between mother ship and the cases suggested in this study.

• International Journal of Aeronautical and Space Sciences
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• v.18 no.4
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• pp.675-687
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• 2017

In the aerospace industry, we have produced various models according to operational conditions and the environment after development of the base model is completed. Therefore, when design change is necessary, there are modification and updating costs of the circuit whenever environment variables change. For these reasons, recently, in various fields, system designs that can flexibly respond to changing environmental conditions using field programmable gate arrays (FPGAs) are attracting attention, and the rapidly changing aerospace industry also uses FPGAs to organize the system environment. In this paper, we design the controller area network (CAN) intellectual property (IP) protocol used instead of the avionics protocol that includes ARINC-429 and MIL-STD-1553, which are not suitable for small unmanned aerial vehicle (UAV) systems at the register transistor logic (RTL) level, which does not depend on the FPGA vender, and we verify the performance. Consequentially, a Spartan 6 FPGA model-based system on chip (SoC) including an embedded system is constructed by using the designed CAN communications IP and Xilinx Microblaze, and the configured SoC only recorded an average 32% logic element usage rate in the Spartan 6 FPGA model.