• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2007년도 추계학술대회 논문집
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• pp.53-53
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• 2007

• 한국주조공학회지
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• 제28권4호
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• pp.154-159
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• 2008

• 한국재료학회지
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• 제13권4호
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• pp.266-270
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• 2003

We studied BCl$_3$ dry etching of GaAs in a planar inductively coupled plasma system. The investigated process parameters were planar ICP source power, chamber pressure, RIE chuck power and gas flow rate. The ICP source power was varied from 0 to 500 W. Chamber pressure, RIE chuck power and gas flow rate were controlled from 5 to 15 mTorr, 0 to 150 W and 10 to 40 sccm, respectively. We found that a process condition at 20 sccm $BCl_3$ 300 W ICP, 100 W RIE and 7.5 mTorr chamber pressure gave an excellent etch result. The etched GaAs feature depicted extremely smooth surface (RMS roughness < 1 nm), vertical sidewall, relatively fast etch rate (> $3000\AA$/min) and good selectivity to a photoresist (> 3 : 1). XPS study indicated a very clean surface of the material after dry etching of GaAs. We also noticed that our planar ICP source was successfully ignited both with and without RIE chuck power, which was generally not the case with a typical cylindrical ICP source, where assistance of RIE chuck power was required for turning on a plasma and maintaining it. It demonstrated that the planar ICP source could be a very versatile tool for advanced dry etching of damage-sensitive compound semiconductors.

• 반도체디스플레이기술학회지
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• 제21권1호
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• pp.95-102
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• 2022

Since the organic light-emitting diodes (OLEDs) have been widely investigated as next-generation displays, it has been successfully commercialized as a flexible and rollable display. However, there is still wide room and demand to improve the device characteristics such as power efficiency and lifetime. To solve this issue, there has been a wide research effort, and among them, the internal and the external light extraction techniques have been attracted in this research field by its fascinating characteristic of material independence. In this study, a micro-nano composite structured external light extraction layer was demonstrated. A reactive ion etching (RIE) process was performed on the surfaces of hexagonally packed hemisphere micro-lens array (MLA) and randomly distributed sphere diffusing films to form micro-nano composite structures. Random nanostructures of different sizes were fabricated by controlling the processing time of the O₂ / CHF₃ plasma. The fabricated device using a micro-nano composite external light extraction layer showed 1.38X improved external quantum efficiency compared to the reference device. The results prove that the external light extraction efficiency is improved by applying the micro-nano composite structure on conventional MLA fabricated through a simple process.

• 폴리머
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• 제28권4호
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• pp.305-313
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• 2004

본 연구는 나노 복화공정을 이용하여 마이크로 혹은 나노공정에 응용이 가능한 형상모형 제작공정 개발과 폴리디메틸실록산 (polydimethylsiloxane)를 이용하여 만들어진 형상모형의 몰드로 나노급 정밀도의 폴리디메틸실록산 형상을 복제하는 공정에 관한 것이다. 본 연구에서 제안한 나노 복화공정은 복잡한 형상모형 (pattern)이나 2차원 형상을 CAD 파일 없이 비트맵 그림파일을 이용하여 직접적으로 200nm 정밀도를 가지는 형상으로 만들 수 있다. 형상모형은 펨토초 레이저를 이용하여 이광자 흡수 중합법으로 제작하기 때문에 형상의 정밀도는 레이저 범의 회절한계 이하로 얻을 수 있다. 이렇게 제작된 마스터 형상모형은 본 연구에서 제안한 진공압력차이법으로 폴리디메틸실록산 몰드를 제작하여 기존의 제작방법에 비하여 정밀한 제작이 가능함을 보였으며 또한 제작된 몰드를 이용하여 양각의 플리디메틸실록산 스탬프를 제작하였다.

• 한국분말재료학회지
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• 제22권1호
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• pp.15-20
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• 2015

The composite of porous silicon (Si) and amorphous carbon (C) is prepared by pyrolysis of a nano-porous Si + pitch mixture. The nano-porous Si is prepared by mechanical milling of magnesium powder with silicon monoxide (SiO) followed by removal of MgO with hydrochloric acid (etching process). The Brunauer-Emmett-Teller (BET) surface area of porous Si ($64.52m^2g^{-1}$) is much higher than that before etching Si/MgO ($4.28m^2g^{-1}$) which indicates pores are formed in Si after the etching process. Cycling stability is examined for the nano-porous Si + C composite and the result is compared with the composite of nonporous Si + C. The capacity retention of the former composite is 59.6% after 50 charge/discharge cycles while the latter shows only 28.0%. The pores of Si formed after the etching process is believed to accommodate large volumetric change of Si during charging and discharging process.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권1호
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• pp.40-45
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• 2008

We developed small molecular organic nonvolatile $4F^2$ memory cells using metal layer evaporation followed by $O_2$ plasma oxidation. Our memory cells sandwich an upper ${\alpha}$-NPD layer, Al nanocrystals surrounded by $Al_2O_3$, and a bottom ${\alpha}$-NPD layer between top and bottom electrodes. Their nonvolatile memory characteristics are excellent: the $V_{th},\;V_p$ (program), $V_e$ (erase), memory margin ($I_{on}/I_{off}$), data retention time, and erase and program endurance were 2.6 V, 5.3 V, 8.5 V, ${\approx}1.5{\times}10^2,\;1{\times}10^5s$, and $1{\times}10^3$ cycles, respectively. They also demonstrated symmetrical current versus voltage characteristics and a reversible erase and program process, indicating potential for terabit-level nonvolatile memory.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권2호
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• pp.83-88
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• 2005

The interface-states between the top silicon layer and buried oxide layer of nano-SOI substrate were developed. Also, the effects of thermal treatment processes on the interface-state distributions were investigated for the first time by using pseudo-MOSFETs. We found that the interface-state distributions were strongly influenced by the thermal treatment processes. The interface-states were generated by the rapid thermal annealing (RTA) process. Increasing the RTA temperature over $800^{\circ}C$, the interface-state density considerably increased. Especially, a peak of interface-states distribution that contributes a hump phenomenon of subthreshold curve in the inversion mode operation of pseudo-MOSFETs was observed at the conduction band side of the energy gap, hut it was not observed in the accumulation mode operation. On the other hand, the increased interface-state density by the RTA process was effectively reduced by the relatively low temperature annealing process in a conventional thermal annealing (CTA) process.

• 대한기계학회논문집A
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• 제31권1호
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• pp.50-54
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• 2007

Nickel nano and microstructures are fabricated with simple process. The fabrication process consists of nickel deposition, lithography, nickel ion etching and plasma ashing. Well-aligned nickel nanowalls and nickel self-encapsulated microchannels were fabricated. We found that the ion etching condition as a key fabrication process of nickel nanowalls and self-encapsulated microchannels, i.e., 40 sccm Ar flow, 550 W RF power, 15 mTorr working pressure, and $20^{\circ}C$ water cooled platen without using He backside cooling unit and with using it, respectively. We present the experimental results and discuss the formational conditions and the effect of nickel redeposition on the fabrication of nickel nano and microstructures.

• 한국세라믹학회지
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• 제47권4호
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• pp.338-342
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• 2010

Co, $Fe_3O_4$ and Co/$Fe_3O_4$ nanoparticles were synthesized by a polyol process in order to develop their new applications and improve chemical, magnetic properties. The synthesis involved a polyol process using Fe, Co acetylacetonate as precursors and 1-2 hexadecanediol as the polyol. The synthesized $Fe_3O_4$ and Co/$Fe_3O_4$ nanocomposite particles were monodispersed and self arrayed ranging in size of 8~10 and 10~25 nm, respectively. The Co nanoparticle has a crystallite size of 10~40 nm. The synthesized nanoparticles were characterized by their structural, morphological, compositional and magnetic properties using TEM-EDS, XRD, and PPMS techniques.