• Journal of applied mathematics & informatics
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• v.39 no.5_6
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• pp.859-882
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• 2021

In the proposed paper, a new algorithm based on Nonlinear Feedback Shift Register (NLFSR) and modified RC4A (Rivest Cipher 4A) cipher is introduced. NLFSR is used for image pixel scrambling while modified RC4A algorithm is used for pixel substitution. NLFSR used in this algorithm is of order 27 with maximum period 2^27-1 which was found using Field Programmable Gate Arrays (FPGA), a searching method. Modified RC4A algorithm is the modification of RC4A and is modified by introducing non-linear rotation operator in the Key Scheduling Algorithm (KSA) of RC4A cipher. Analysis of occlusion attack (up to 62.5% pixels), noise (salt and pepper, Poisson) attack and key sensitivity are performed to assess the concreteness of the proposed method. Also, some statistical and security analyses are evaluated on various images of different size to empirically assess the robustness of the proposed scheme.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.5
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• pp.896-904
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• 1987

In this paper, a design method for sequential circuit which is easy to have Built-in Self Test is kproposed using the functional advantages of multifunctional BILBO and LSSD. To achieve the hardware reduction, it is designed that a multifunctional BILBO has double operational functions of NLFSR and LFSR, when neccessary, and that test signal could be used as an input-output signal in the same line. By applying the proposed multifunctional BILBO to the sequential PLA, the test patterns and the additional circuit could be reduced in test operation and the propagation delay is vanished in normal operation, as we expected. Above them, the partitioned method for large scale sequential circuit is also suggested and it is observed that test patterns and additional circuit in them reduced by this method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.9
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• pp.1702-1708
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• 2007

Dragon Stream Cipher is proposed for software base implementation in the eSTREAM project. Now this stream cipher is selected as a phase 3 focus candidate. Dragon is a new stream cipher contructed using a single word based NIFSR(non-linear feed back shift register) and 128/256 key/IV(Initialization Vector). Dragon is the keystream generator that produce 64bits of keystream. In this paper, we present an implementation of Drag(m stream cipher algorithm in hardware. Finally, the implementation is on Altera FPGA device, EP3C35F672I and the timing simulation is done on Altera's Quartus II. A result of 111MHz maximum clock rate and 7.1Gbps is throughput is obtained from the implementation.