• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.7 no.7
• /
• pp.1393-1398
• /
• 2003

In this paper, we propose a new switch architecture with one schedule at k-time slots, which k means the allocated time slots for each schedule. A conventional switch system uses a single time slot per each schedule but the proposed switch system uses multiple time slots per each schedule. Both the conventional switch md the proposed switch have same throughput but our switch system occupies multiple cell time slots per each schedule and hence can be implemented in scheduler of simple circuitry compared to the conventional switch. The proposed scheduling method for switch system will be applicable in switch system with high-speed data link rate.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2004.05b
• /
• pp.291-294
• /
• 2004

In this paper, we consider the broadcast switch architecture for hish performance multicast packet switching. In input and output buffered switch, we propose a new switch architecture which supports high throughput in broadcast packet switching with switch planes of single input and multiple output crossbars. The proposed switch architecture has a central arbiter that arbitrates requests from plural input ports and generates multiple grant signals to multiple output ports in a packet transmission slot. It provides high speed pipelined arbitration and large scale switching capacity.

• Journal of the Korea Society of Computer and Information
• /
• v.22 no.6
• /
• pp.123-129
• /
• 2017

In this paper, we proposed a smart multiple-tap system which a remote user with smartphone can control multiple-taps in order to reduce standby-power consumption more conveniently when plugged-in electric appliances are turned-off. Recently, several researches of smart multiple-tap using IoT technology has reported. However, in these researches, an additional device like as a server computer is necessary, or multiple-taps could be only remotely controlled by smartphone and not directly controlled by on/off switch. The proposed smart multiple-tap system does not need any additional device only if it has a WiFi router, and it can be used for user as well as remote control using smartphone application and physically direct control using contact switches like existing multiple-taps. Our approach is to develop a smart multiple-tap device capable of WiFi communication can each serve as a server or a client, and can be operated by the hybrid switch combining the on/off contact switch and the relay switch. We implemented the prototype of the proposed system composed of the smart multiple-tap device and the smartphone application, and the test of the prototype validates the proposed system.

• Journal of Internet Computing and Services
• /
• v.9 no.2
• /
• pp.15-23
• /
• 2008

This paper proposes the new structural MOQ(Multiple Input/Output-Queued) switch which guarantees QoS while maintaining high efficiency and deals with the Anti-Empty algorithm which is new arbitration algorithm to be used for the proposed switch. The new structure of the proposed switch based on MIQ, MOQ is designed to have the same buffer speed as the external line speed. Also, the proposed switch makes it possible to remove the weak point of existing methods and introduces the new method of the MOQ operation to support QoS. Therefore, this switch is equal to the Output Queued switch in efficiency and delay, and guarantees the high-speed switching supporting QoS without cell loss.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.5 no.3
• /
• pp.128-135
• /
• 2010

Recently complexity of embedded software cause to be used real-time operating system (RTOS) to implement various functions in the embedded system. And also, according to requirement of complex functions in embedded systems, the number as well as complexity of tasks get increased continuously. In case that many tasks collaborated in a microprocessor, context switching time between tasks is a overhead waisting a CPU resource. Therefore the time of task context switching is an important factor that affects performance of RTOS. In this paper, we concentrate on the improvement of task context switch for reducing overhead and achieving fast response time in RTOS. To achieve these goal, we suggest multiple register files and task context switching algorithm. By reducing the context switch overhead, we try to ease scheduling and assure fast response times in multitasking environment. As a result, the context switch overhead decreased by 8~16% depend on the number of register files, and some task set which are not schedulable with single register file are schedulable due to that decrease with multiple register files.

• Journal of the Korea Society of Computer and Information
• /
• v.11 no.1 s.39
• /
• pp.157-165
• /
• 2006

This paper proposes a new output-buffered multicast ATM switch with tandem crosspoints switching fabric, named the MTCOS(Multicast Tandem Crosspoint Output-buffered Switch). The MTCOS consists of multiple simple crosspoint switch fabrics, named TCSF(Tandem Crosspoint Switch Fabric) , and concentrated output buffers for efficient multicasting. The TCSF resolves the cell delay deviation problem which the self-routing crossbar switches inherently have. Further, it offers multiple concurrent pathes from one input to multiple output ports. It also provides multi-channel switching by easy software configuration and has several desirable characteristics such as scalability, high Performance, and modularity. A shared traffic concentration and output queuing strategies of the MTCOS results in lower cell loss as well as lower cell delay time over a wide range of multicast traffic. Furthermore, it has lower hardware complexity than that of the SCOQ and Knockout multicast switch to achieve the same Knockout concentration rate as the conventional switches. It is shown that the proposed switch can be easily applied to design high performance for any multicast traffic by analytic analysis and computer simulation.

• Journal of KIISE:Information Networking
• /
• v.32 no.2
• /
• pp.244-253
• /
• 2005

In this paper, a performance evaluation model of the switch router with the multiple-buffered crossbar switches is proposed and examined. Buffered switch technique is well known to solve the data collision problem of the crossbar switch. The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch with output-buffers. The performance of the multiple-buffered crossbar switch is analyzed. Steady state probability concept is used to simplify the analyzing processes. Two important parameters of the network performance, throughput and delay, are then evaluated. To validate the proposed analysis model, the simulation is carried out on a network that uses the multiple buffered crossbar switches. Less than $2\%$ differences between analysis and simulation results are observed. It is also shown that the network performance is significantly improved when the small number of buffer spaces is given. However, the throughput elevation is getting reduced and network delay becomes increasing as more buffer spaces are added in a switch.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.12C
• /
• pp.261-267
• /
• 2001

This paper presents the architecture of multiple-queue manager for input-queued switch, which has arbitration latency, and the design of the chip. The proposed architecture of multiple-queue manager provides wire-speed routing with a pipelined buffer management, and the tolerance of requests and grants data transmission latency between the input queue manager and central arbiter using a new request control method, which is based on a high-speed shifter. The multiple-input-queue manager has been implemented in a field programmable gate array chip, which provides OC-48c port speed. It enhances the maximum throughput of the input queuing switch up to 98.6% with 128-cell shared input buffer in 16$\times$16 switch size.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.15 no.3
• /
• pp.334-342
• /
• 2012

Data association is important technology which designate final destination in the target tracking. The joint probabilistic data association(JPDA) algorithm provides excellent ability to maintain track on multiple targets. Currently, it is not easily implemented in real time because of track coalescence & switch. The aim of this paper is to develop probabilistic filters that increase JPDA's sensitivity and decrease track coalescence & switch in a cluttered environments.

• Journal of the Korea Society for Simulation
• /
• v.8 no.4
• /
• pp.1-8
• /
• 1999

This paper proposes an ATM switch architecture called Output Queued Batcher-Banyan switch (OQBBS). It consists of a Sorting Module, Expanding Module, and Output Queueing Modules. The principles of channel grouping and output queueing are used to increase the maximum throughput of an ATM switch. One distinctive feature of the OQBBS is that multiple cells can be simultaneously delivered to their desired output. The switch architecture is shown to be modular and easily expandable. The performance of the OQBBS in terms of throughput, cell delays, and cell loss rate under uniform random traffic condition is evaluated by computer simulation. The throughput and the average cell delay are close to the ideal performance behavior of a fully connected output queued crossbar switch. It is also shown that the OQBBS meets the cell loss probability requirement of $10^{-6}$.