• Title/Summary/Keyword: Multilevel Inverters

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Unification of Buck-boost and Flyback Converter for Driving Cascaded H-bridge Multilevel Inverter with Single Independent DC Voltage Source

  • Kim, Seong-Hye;Kim, Han-Tae;Park, Jin-Soo;Kang, Feel-Soon
    • Journal of international Conference on Electrical Machines and Systems
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    • v.2 no.2
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    • pp.190-196
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    • 2013
  • It presents a unification of buck-boost and flyback converter for driving a cascaded H-bridge multilevel inverter with a single independent DC voltage source. Cascaded H-bridge multilevel inverter is useful to make many output voltage levels for sinusoidal waveform by combining two or more H-bridge modules. However, each H-bridge module needs an independent DC voltage source to generate multi levels in an output voltage. This topological characteristic brings a demerit of increasing the number of independent DC voltage sources when it needs to increase the number of output voltage levels. To solve this problem, we propose a converter combining a buck-boost converter with a flyback converter. The proposed converter provides independent DC voltage sources at back-end two H-bridge modules. After analyzing theoretical operation of the circuit topology, the validity of the proposed approach is verified by computer-aided simulations using PSIM and experiments.

A Cascaded Multilevel Inverter Using Bidirectional H-bridge Modules

  • Kang, Feel-Soon;Joung, Yeun-Ho
    • Journal of international Conference on Electrical Machines and Systems
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    • v.1 no.4
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    • pp.448-456
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    • 2012
  • This paper presents a multilevel inverter configuration which is designed by insertion of a bidirectional switch between capacitive voltage sources and a conventional H-bridge module. The modified inverter can produce a better sinusoidal waveform by increasing the number of output voltage levels. By serial connection of two modified H-bridge modules, it is possible to produce 9 output voltage levels including zero. There are 24 basic switching patterns with the 9 output voltage levels. Among the patterns, we select the 2 most efficient switching patterns to get a lower switching loss and minimum dv/dt stress. We then analyze characteristics of Total Harmonic Distortion (THD) of the output voltage with variation of input voltage by computer-aided simulations and experiments.

Multi-modulating Pattern - A Unified Carrier based PWM Method in Multi-level Inverter - Part 1

  • Nho Nguyen Van;Youn Myung Joong
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.620-624
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    • 2004
  • Th is paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using the proposed multi-modulating pattern method. This method is based on the vector correlation between CPWM and space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. The CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain a full vector redundancy control, and fully utilize phase redundancy in a cascade inverter. In the paper, CPWM equations and corresponding algorithm for generating multi-modulating signals will be performed, in which SVPWM attributes will be presented by corresponding controllable factors.

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Multi-modulating Pattern - A Unified Carrier based PWM method In Multi-level Inverter - Part 2

  • Nho Nguyen Van;Youn Myung Joong
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.625-629
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    • 2004
  • This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

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Efficient Hybrid Carrier Based Space Vector Modulation for a Cascaded Multilevel Inverter

  • Govindaraju, C.;Baskaran, K.
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.277-284
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    • 2010
  • This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

A New Switching Pattern for Multilevel Inverter Based on Selective Harmonic Elimination Using Genetic Algorithm

  • Fekari, Seyyed Amir;Iranaq, Ali Reza Marami;Sabahi, Mehran
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.3
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    • pp.305-311
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    • 2014
  • In this paper, a new switching pattern is presented for multilevel inverters. With changing off-angel of each switch, the on time interval of all switches will approximately be equal and then the lifetime of inverter will increase, also using this method can reduce electrical stress on switches in higher levels of inverter. Switching angels as for desired modulation index are calculated using genetic algorithm whereas selective harmonics are controlled within the allowable range. The computed angels are simulated in Matlab/Simulink for respective circuits to validate the results.

Multilevel Inverter to Reduce Common Mode Voltage in AC Motor Drives Using SPWM Technique

  • Renge, Mohan M.;Suryawanshi, Hiralal M.
    • Journal of Power Electronics
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    • v.11 no.1
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    • pp.21-27
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    • 2011
  • In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.

A Novel Quadrant Search Based Mitigation Technique for DC Voltage Fluctuations in Multilevel Inverters

  • Roseline, Johnson Anitha;Vijayenthiran, Subramanian;V., Rajini;Mahadevan, Senthil Kumaran
    • Journal of Power Electronics
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    • v.15 no.3
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    • pp.670-684
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    • 2015
  • The hybrid cascaded multilevel inverter (HCMLI) is a popular converter topology that is being increasingly used in high power medium voltage drives. The intricacy of the control technique for a HCMLI increases with the number of levels and due to fluctuating dc voltages. This paper presents a novel offline quadrant search based space vector modulation technique to synthesize a sinusoidal output from a dispersed pattern of voltage vectors due to different voltages in the auxiliary unit. Such an investigation has never been reported in the literature and it is being attempted for the first time. The method suggested distributes the voltage vectors for a reduced total harmonic distortion at minimal computation. In addition, the proposed algorithm determines the maximum modulation index in the linear modulation range in order to synthesize a sinusoidal output for both normal and abnormal vector patterns. It is better suited for a wide range of practical applications. It is particularly well suited for renewable source fed inverters which utilize large capacitor banks to maintain the dc link, which are prone to such slow fluctuations. The proposed quadrant search space vector modulation technique is simulated using MATLAB/SIMULINK and implemented using a Nexys-2 Spartan-3E FPGA for a developed prototype.

Employing Multi-Phase DG Sources as Active Power Filters, Using Fuzzy Logic Controller

  • Ghadimi, Ali Asghar;Ebadi, Mazdak
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1329-1337
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    • 2015
  • By placing distributed generation power sources beside a big nonlinear load, these sources can be used as a power quality enhancer, while injecting some active power to the network. In this paper, a new scheme to use the distributed generation power source in both operation modes is presented. In this scheme, a fuzzy controller is added to adjust the optimal set point of inverter between compensating mode and maximum active power injection mode, which works based on the harmonic content of the nonlinear load. As the high order current harmonics can be easily rejected using passive filters, the DG is used to compensate the low order harmonics of the load current. Multilevel transformerless cascade inverters are preferred in such utilization, as they have more flexibility in current/voltage waveform. The proposed scheme is simulated in MATLAB/SIMULINK to evaluate the circuit performance. Then, a 1kw single phase prototype of the circuit is used for experimental evaluation of the paper. Both simulative and experimental results prove that such a circuit can inject a well-controlled current with desired harmonics and THD, while having a smaller switching frequency and better efficiency, related to previous 3-phase inverter schemes in the literature.

Elimination of Low Order Harmonics in Multilevel Inverters Using Genetic Algorithm

  • Salehi, Reza;Farokhnia, Naeem;Abedi, Mehrdad;Fathi, Seyed Hamid
    • Journal of Power Electronics
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    • v.11 no.2
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    • pp.132-139
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    • 2011
  • The selective harmonic elimination pulse width modulation (SHEPWM) switching strategy has been applied to multilevel inverters to remove low harmonics. Naturally, the related equations do not have feasible solutions for some operating points associated with the modulation index (M). However, with these infeasible points, minimizing instead of eliminating harmonics is performed. Thus, harmful harmonics such as the $5^{th}$ harmonic still remains in the output waveform. Therefore, it is proposed in this paper to ignore solving the equation associated with the highest order harmonics. A reduction in the eliminated harmonics results in an increase in the degrees of freedom. As a result, the lower order harmonics are eliminated in more operating points. A 9-level inverter is chosen as a case study. The genetic algorithm (GA) for optimization purposes is used. Simulation results verify the proposed method.