• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.439-442
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• 2004

Timing delays due to VLSI circuit interconnects strongly depend on neighbor line switching patterns as well as input transition time. Considering both the input transition and input switching pattern, a new analytical timing delay model is developed by using the decoupling technique of transfer multi-coupled lines into an effective single line. The analytical timing delay model can determine the timing delay of multi-coupled lines accurately as well as rapidly. It is verified by using DSM-Technology ($0.1{\mu}m$ /low-k copper-based process) that the model has excellent agreement with the results of SPICE simulation.

• Journal of the Korea Society of Computer and Information
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• v.6 no.2
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• pp.84-89
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• 2001

In this paper, an improved protocol of Multi-Link Switching Method is proposed by supplementing a concurrent processing function. This protocol is proposed to complement the shortcomings of the conventional Multi-Link Switching Method which is used for the medium access in LAN. We analyzed the improved protocol in channel utilization viewpoint and compared the result with that of the conventional protocol From this result, we showed that the channel utilization of the improved protocol is superior to that of the conventional protocol when the maximum normalized propagation delay is increased.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.53-55
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• 2006

In this paper discusses winding methode of single phase AC-DC reversible power converter The reversible power converter driven by multi Tap winding at both side switching control. It has a advantage that simple drive of main switching device. and obtain load current of good quality without filter circuit and free from noise or isolation for lower switching frequency. In this research, study on current type converter and inverter circuit that consist for possibility of AC-DC/DC-AC multi-level reversible converter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.12
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• pp.1300-1312
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• 1991

In this paper we syudy the time slot sequence integrity(TSSI) of multi-slot calls in the single-buffered switching networks and analyze their traffic characteristics in terms of traffic mixture ratio, number of random searches for idle time slots, and their blocking probablities. This result can be utilized in the design of wideband switching networks in the single buffered systems, such as TDX IA/B swithcing systems, for accommodating multi slot calls.

• 전기의세계
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• v.28 no.12
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• pp.33-40
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• 1979

This mininzation of the multi-output switching function becomes a difficult task when the input varibles and the number of functions increase. This paper describes the optimal selection of prime inplicats for the multi-output switching function by using the Inter-section Table. This procedure is applicable to both manual and computhe programmed realization without complesith. The algorithm is implemented by a computer program in the standard FORTRAN iv language.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.9
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• pp.468-474
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• 2003

This paper describes the development of an open frame type high power density switching converter. It is based on the active clamp forward converter with synchronous rectifier, and packaged by using the open frame and multi-layer printed circuit board (PCB) technology to achieve the higher power density. Furthermore, the windings of transformer and inductor are also realized by multi-layer PCB so that it also contributes to achieve higher power density. Through the experiment on the prototype converter of 50[W], it is confirmed that power density of 50[W/i$n_3$] and maximum efficiency of over 91[%] are obtained.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.2
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• pp.111-120
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• 2002

The multi-level inverter system is very promising in ac drives, when both reduced harmonic contents and high power are required. In case of multi-level inverter system, the loss of switch devices cannot be analyzed by conventional methods. The reason is that the loss of each the switch device is different from one another unlike 2-level. In this paper, a simple and accurate method of computing conduction and switching loss is proposed for multi-level inverter system. The validity of the proposed method is proven for 3-level and 4-revel diode clamped inverter system.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.9-14
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• 1999

In this paper, we proposed a simultaneous switching noise (SSN) reduction technique in multi-layer boards (MLB) for high-speed digital applications and analyzed it using the Finite Difference Time Domain (FDTD) method. The new structure using conductive dielectric substrates is effective for the reduction of SSN couplings and resonances. The uniform insertion of the conducive layer reduced the SSN coupling and resonance by 85% and the partial insertion only around the edges reduced by 55% respectively.

• Proceedings of the KIEE Conference
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• 2002.06a
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• pp.38-40
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• 2002

In the case of conventional high frequency inverter, with damage of switch by surge voltage when switch gets into compulsion extinction by load accident and so on because reactor is connected by series to switch, or there was problem of conduction loss by reactor's resistivity component, Also, it has controversial point of that can not ignore conduction loss of switch in complete work kind action of soft switching. In this paper, as high frequency induction heating power supply, we propose half bridge type multi resonance soft switching high frequency inverter topology that can realize high amplitude operation of load current with controlling switch current by multiplex resonance, mitigating surge voltage when switch gets into compulsion extinction and to be complete operation of zero current switching by opposit parallel connected reactor to inverter switch. and do circuit analysis for choice of most suitable circuit parameter of circuit

• Journal of the Korea Society of Computer and Information
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• v.6 no.4
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• pp.68-73
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• 2001

MPLS(Multi protocol Label Switching) is standard skill for added to speed and control the Network Traffic. MPLS concerned the routing protocol to relative Pack line, Each Pack composed label and node, saved the time to seek the address of node. MPLS worked IP, ATM and Network protocol of flame rely. MPLS is Network OSI suport model, 2Layer send to most of Packinsted of 3Layer Switching. MPLS is added speed Traffic of QoS and effective controled the Network.