• Journal of Broadcast Engineering
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• v.19 no.1
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• pp.14-23
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• 2014

This paper proposed controlling methods for SDN(Software Defined Network) based multiple radio access technology as the solutions of following two issues which were mainly occurred by explosive increasing of video traffic. The first one is a requirement for traffic off-loading caused by 3rd-party video service providers from the mobile network operator's viewpoint. The other one is a provision of high-speed video contents transmission services with low price. Furthermore, the performance evaluation was also conducted on the real test-bed which is composed of OpenStack cloud and SDN technology such as OpenFlow and Open vSwitch. A virtual machine running on the OpenStack provide a video service and the terminal which is able to use multiple radio access technology supports two 2.4GHz WLANs(Wireless Local Area Network) and three 5GHz WLANs, concurrently. Finally, we can get 820Mbps of the maximum transmission speed by using that five WLAN links for the single service at the same time.

• KIPS Transactions on Computer and Communication Systems
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• v.12 no.4
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• pp.127-134
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• 2023

This paper describes how to port the eCos operating system and PROFINET communication stack developed based on gcc to the IAR compiler. The eCos operating system provides basic functions such as multi-thread, TCP/IP, and device driver for PROFINET operation, so there is no need to change it when developing PROFINET applications. Therefore, in this study, we reuse an eCos library built with gcc and it link with PROFINET communication stack that are ported to IAR complier. Due to the different of the gcc and IAR linker, symbol definitions and address of the constructors should be changed using the external tool that generates symbol definitions and address of the constructors from MAP file. In order to verify the proposed method, it was confirmed that the actual I/O was operating normally through PROFINET IRT communication by connecting to the Siemens PLC. IAR compiler has better performance in both the compile time and the size of the generated binary. The proposed method in this study is expected to help port various open sources as well as eCos and PROFINET communication stacks to other compilers.

• KIPS Transactions on Software and Data Engineering
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• v.12 no.2
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• pp.83-90
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• 2023

Blurred image is an important factor in lowering image recognition rates in Computer vision. This mainly occurs when the camera is unstablely out of focus or the object in the scene moves quickly during the exposure time. Blurred images greatly degrade visual quality, weakening visibility, and this phenomenon occurs frequently despite the continuous development digital camera technology. In this paper, it replace the modified building module based on the Deep multi-patch neural network designed with convolution neural networks to capture details of input images and Attention techniques to focus on objects in blurred images in many ways and strengthen the image. It measures and assigns each weight at different scales to differentiate the blurring of change and restores from rough to fine levels of the image to adjust both global and local region sequentially. Through this method, it show excellent results that recover degraded image quality, extract efficient object detection and features, and complement color constancy.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2005.09a
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• pp.67-88
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• 2005

Mold-Flow 3 Die Stack CSP of Mold array packaging with different Gate types. As high density package option such as 3 or 4 die stacking technologies are developed, the major concerning points of mold related qualities such as incomplete mold, exposed wires and wire sweeping issues are increased because of its narrow space between die top and mold surface and higher wiring density. Full 3D rheokinetic simulation of Mold flow for 3 die stacking structure case was done with the rheological parameters acquired from Slit-Die rheometer and DSC of commercial EMC. The center gate showed severe void but corner gate showed relatively better void performance. But in case of wire sweeping related, the center gate type showed less wire sweeping than corner gate types. From the simulation results, corner gate types showed increased velocity, shear stress and mold pressure near the gate and final filling zone. The experimental Case study and the Mold flow simulation showed good agreement on the mold void and wire sweeping related prediction. Full 3D simulation methodologies with proper rheokinetic material characterization by thermal and rheological instruments enable the prediction of micro-scale mold filling behavior in the multi die stacking and other complicated packaging structures for the future application.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.260-263
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• 2005

The effects of internal manifold designs the reactant feed-stream in Polymer Electrolyte Fuel Cells (PEFCs) is studied to figure out mass flow-distribution patterns over an entire fuel cell stack domain. Reactants flows are modeled either laminar or turbulent depending on regions and the open channels in the bipolar plates are simulated by porous media where permeability should be pre-determined for computational analysis. In this work, numerical models for reactant feed-stream in the PEFC manifolds are classified into two major flow patterns: Z-shape and U-shape. Several types of manifold geometries are analyzed to find the optimal manifold configurations. The effect of heat generation in PEFC on the flow distribution is also investigated applying a simplified heat transfer model in the stack level (i.e. multi-cell electrochemical power-generation unit). This modeling technique is well suited for many large scale problems and this scheme can be used not only to account for the manifold flow pattern but also to obtain information on the optimal design and operation of a PEMC system.

• Transactions of the Korean Society of Automotive Engineers
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• v.15 no.3
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• pp.124-132
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• 2007

The main objective of this work is to investigate the characteristics of a heat pump system for fuel cell electric vehicle (FCEV). The present heat pump system adopts an electrically driven compressor running with R134a and uses the heat from the fuel cell stack as the heat source for the exterior heat exchanger. The experimental work has been done with various operating conditions such as different compressor speeds, fuel cell stack coolant temperatures and flow rates. The heating capacity was measured to be from 4 to 10 kW at $-20^{\circ}C$ ambient temperature, and the outlet temperature of interior heat exchanger was up to $70^{\circ}C$. After 30 seconds from start-up, the system reached a steady state and the heating capacity of 6.8 kW was acquired, and after 90 seconds, the air outlet temperature of interior heat exchanger became $35^{\circ}C$.

• Journal of ILASS-Korea
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• v.22 no.2
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• pp.69-79
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• 2017

When designing a redox flow battery system, compression of battery stack is required to prevent leakage of electrolyte and to reduce contact resistance between cell components. In addition, stack compression leads to deformation of the porous carbon electrode, which results in lower porosity and smaller cross-sectional area for electrolyte flow. In this paper, we investigate the effects of electrode compression on the cell performance by applying multi-dimensional, transient model of all-vanadium redox flow battery (VRFB). Simulation result reveals that large compression leads to greater pressure drop throughout the electrodes, which requires large pumping power to circulate electrolyte while lowered ohmic resistance results in better power capability of the battery. Also, cell compression results in imbalance between anolyte and catholyte and convective crossover of vanadium ions through the separator due to large pressure difference between negative and positive electrodes. Although it is predicted that the battery power is quickly improved due to the reduced ohmic resistance, the capacity decay of the battery is accelerated in the long term operation when the battery cell is compressed. Therefore, it is important to optimize the battery performance by taking trade-off between power and capacity when designing VRFB system.

• Transactions of the Korean hydrogen and new energy society
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• v.24 no.1
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• pp.84-90
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• 2013

The hydrogen or oxygen gas producted by electrolysis become many bubbles in the electrolyte, but exact data on the behavior of these bubbles in the separator of an electrolysis stack didn't become known. In this study, the flow visualization experiment on the behavior of bubbles in the flow pattern of the array type separator is performed by using of a visible alkaline electrolysis stack and a stereoscopic microscope. As the results, a fine size bubbles adhered to the surface of the flow pattern grow to large sized bubbles until each bubble's buoyance is lager than the sum of external force and weight. And then the large bubbles flow into the upper area of the separator. Bubbles adhered to the surface of the vertical flow pattern grow quickly than them adhered to the surface of the horizontal flow pattern. Also, he electrolysis efficiency is declined because many multi-size bubbles occupied the wide volume in the flow pattern.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.1 s.116
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• pp.62-75
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• 2007

This paper describes a shaped-beam antenna for increasing the antenna gain of a radiating element. The proposed antenna structure is composed of an exciting element and a multi-layered disk array structure(MDAS). The stack micro-strip patch elements were used as the exciter for effectively radiating the electromagnetic power to the MDAS over the broadband, and finite metallic disk array elements - which give the role of a director for shaping the antenna beam with the high gain - were finitely and periodically layered onto it. The efficient power coupling between the exciter and the MDAS should be carried out in such a way that the proposed antenna has a high gain characteristic. The design parameters of the exciter and the MDAS should be optimized together to meet the required specifications to meet the required specifications. In this study, a shaped-beam antenna with high gain was optimally designed under the operating conditions with a linear polarization and the frequency band of $9.6{\sim}10.4\;GHz$. Two methods constructed using thin dielectric film and dielectric foam materials respectively were also proposed in order to implement the MBAS of the antenna. In particular, through the computer simulation process, the electrical performance variations of the antenna with the MDAS realized by the thin dielectric film materials were shown according to the number of disk array elements in the stack layer. Two kinds of antenna breadboard with the MDAS realized with the thin dielectric film and dielectric foam materials were fabricated, but experimentation was conducted only on the antenna breadboard(Type 1) with the MDAS realized with the thin dielectric film materials according to the number of disk array elements in the stack layer in order to compare it with the electrical performance variations obtained during the simulation. The measured antenna gain performance was found to be in good agreement with the simulated one, and showed the periodicity of the antenna gain variations according to the stack layer number of the disk array elements. The electrical performance of the Type 1 antenna was measured at the center frequency of 10 GHz. As the disk away elements became the ten stacks, a maximum antenna gain of 15.65 dBi was obtained, and the measured return loss was not less than 11.4 dB within the operating band. Therefore, a 5 dB gain improvement of the Type 1 antenna can be obtained by the MDAS that is excited by the stack microstrip patch elements. As the disk array elements became the twelve stacks, the antenna gain of the Type 1 was measured to be 1.35 dB more than the antenna gain of the Type 2 by the outer dielectric ring effect, and the 3 dB beam widths measured from the two antenna breadboards were about $28^{\circ}$ and $36^{\circ}$ respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.