• Title/Summary/Keyword: Multi-layer chip varistor

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Electrical Properties of Multilayer Chip Varistor for ESD Protection with High Reliability. (고신뢰성 ESD보호용 칩 바리스터의 전기적 특성)

  • Yoon, Jung-Rag;Cho, Hyun-Moo;Lee, Jong-Deok;Park, Sang-Man;Lee, Young-Hie;Lee, Sung-Gap;Choe, Geun-Muk;Jeong, Tae-Seok;Lee, Seok-Won;Lee, Heon-Yong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.319-320
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    • 2006
  • In order to improve the ESD(Electrical Static Discharge) resistance of multilayer chip varistors, we have investigated ZnO-$Pr_6O_{11}$ based chip varistor by applying tape casting technology, whose fundamental component were ZnO : $Pr_6O_{11}$ :$Co_3O_4$: $Y_2O_3$: $Al_2O_3$=93.67: 2.53:2.53:1.25 : 0.015 (wt %). The effect of sintering condition on the multilayer chip varistors and electric properties was studied. The electrical properties and ESD resistance of multilayer chip varistor could be influenced the sintering temperature and condition.

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Microstructure and Electrical Properties of ZnO-Zn2BiVO6-Mn3O4 Varistor (ZnO-Zn2BiVO6-Mn3O4 바리스터의 미세구조와 전기적 특성)

  • Hong, Youn-Woo;Ha, Man-Jin;Paik, Jong-Hoo;Cho, Jeong-Ho;Jeong, Young-Hun;Yun, Ji-Sun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.5
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    • pp.313-319
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    • 2018
  • This study introduces a new investigation report on the microstructural and electrical property changes of $ZnO-Zn_2BiVO_6-Mn_3O_4$ (ZZMn), where 0.33 mol% of $Mn_3O_4$ and 0.5 mol% of $Zn_2BiVO_6$ were added to ZnO (99.17 mol%) as liquid phase sintering aids. $Zn_2BiVO_6$ contributes to the decrease of sintering temperatures by up to $800^{\circ}C$, and segregates its particles at the grain boundary, while $Mn_3O_4$ enhances ${\alpha}$, the nonlinear coefficient, of varistor properties up to ${\alpha}=62$. In comparison, when the sintering temperature is increased from $800^{\circ}C$ to $1,000^{\circ}C$, the resistivity of ZnO grains decreases from $0.34{\Omega}cm$ to $0.16{\Omega}cm$, and the varistor property degrades. Oxygen vacancy ($V_o^{\bullet}$) (P1, 0.33~0.36 eV) is formed as a dominant defect. Two different kinds of grain boundary activation energies of P2 (0.51~0.70 eV) and P3 (0.70~0.93 eV) are formed according to different sintering temperatures, which are tentatively attributed to be $ZnO/Zn_2BiVO_6$-rich interface and ZnO/ZnO interface, respectively. Accordingly, this study introduces a progressive method of manufacturing ZnO chip varistors by way of sintering ZZMn-based varistor under $900^{\circ}C$. However, to procure a higher reliability, an in-depth study on the multi-component varistors with double-layer grain boundaries should be executed.