• Title, Summary, Keyword: Multi-RESURF

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Study on the Electrical Characteristics of the Multi-RESURF SOI LDMOSFET as a Function of Epi-layer Concentration (에피층 농도 변화에 따른 Multi-RESURF SOI LDMOSFET의 전기적 특성 분석)

  • Kim, Hyoung-Woo;Seo, Kil-Soo;Bahng, Wook;Kim, Ki-Hyun;Kim, Nam-Kyun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.9
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    • pp.813-817
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    • 2006
  • In this paper, we analyzed the breakdown voltage and on-resistance of the multi-RESURF SOI LDMOSFET as a function of epi-layer concentration. P-/n-epi layer thickness and doping concentration of the proposed structure are varied from $2{\sim}5{\mu}m\;and\;1\{times}10^{15}/cm^{3}^{\sim}9\{times}10^{15}/cm^{3}$ to find optimum breakdown voltage and on-resistance of the proposed structure. The maximum breakdown voltage of the proposed structure is $224\;V\;at\;R_{on}=0.2{\Omega}-mon^{2}\;with\;P_{epi}=3\{times}10^{15}/cm^{3},\;N_{epi}=7\{times}10^{15}/cm^{3}\;and\;L_{epi}=10{\mu}m$. Characteristics of the device are verified by two-dimensional process simulator ATHENA and device simulator ATLAS.

Breakdown and On-state characteristics of the Multi-RESURF SOI LDMOSFET (Epi층의 농도 및 두께 변화에 따른 Multi-RESURF SOI LDMOSFET의 특성분석)

  • Kim, Hyoung-Woo;Kim, Sang-Cheol;Seo, Kil-Su;Kim, Nam-Kyun;Kim, Eun-Dong
    • Proceedings of the KIEE Conference
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    • pp.1578-1580
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    • 2002
  • The breakdown and on-state characteristics of the multi-RESURF SOI LDMOSFET is presented. P-/n-epi layer thickness and doping concentration is varied from $2{\mu}m{\sim}5{\mu}m$ and $1{\times}10^{15}/cm^3{\sim}9{\times}10^{15}/cm^3$ to obtain optimum breakdown voltage and on-resistance. The breakdown and on-state characteristics of the device is verified by two-dimensional process simulator ATHENA and device simulator ATLAS.

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On resistance and breakdown voltage of LDMOS with Multi RESURF structure (Multi RESURF구조를 갖는 LDMOS의 on 저항과 항복전압)

  • Choi, E-Kwon;Choi, Yearn-Ik;Chung, Sang-Koo
    • Proceedings of the KIEE Conference
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    • pp.156-158
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    • 2002
  • Reduction of on-resistance($R_{on}$) in high voltage devices is of critical importance for the power consumption of the device. $R_{on}$ decreases with increase of the doping concentration of the drift region. However, breakdown voltage(BV) decreaes also with increase of doping concentration. In this report, a multi-resurf LDMOS[1] strcuture is proposed to reduce the $R_{on}$ which allows no degradation in BV. The on-and off-state characteristics of the proposed structure are simulated using the two-dimensional devices simulator ATLAS and compared with those from the conventional structure.

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Electrical characteristics of the multi-result MOSFET (Multi result MOSFET의 에피층 농도에 따른 전기적 특성분석)

  • Kim, Hyoung-Woo;Kim, Sang-Cheol;S대, Kil-Soo;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • pp.365-368
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    • 2004
  • Charge compensation effects in multi-resurf structure make possible to obtain high breakdown volatage and low on-resistance in vertical MOSFET. In this paper, electrical characteristics of the vertical MOSFET with multi epitaxial layer is presented. Proposed device has n and p-pillar for obtaining the charge compensation effects and The doping concentration each pillar is varied from $5{\times}10^{14}\;to\;1{\times}10^{16}/cm^3$. The thickness of the proposed device also varied from $400{\mu}m\;to\;500{\mu}m$. Due to the charge compensation effects, 4500V of breakdown voltage can be obtained.

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