• 제목/요약/키워드: Multi level inverter

검색결과 188건 처리시간 0.026초

변압기 직렬구성을 이용한 HBML 인버터에 관한 연구 (The Study on the HBML Inverter Using the Cascaded Transformers)

  • 박성준;박노식;강필순;김광헌;임영철;김철우
    • 전력전자학회논문지
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    • 제9권4호
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    • pp.334-340
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    • 2004
  • 본 논문에서는 캐스케이드 변압기를 이용하는 멀티레벨 인버터의 변압기 크기를 동일화시키기 위한 효과적인 스위칭 패턴을 제안한다. 제안된 스위칭 방식은 기존의 SHEPWM 스위칭 방식을 기초로 하여 각 변압기에 인가되는 최대 자속을 동일하게 함으로서 캐스케이드 변압기의 위치에 상관없이 동일한 설계가 가능하다. 따라서 동일한 풀-브리지 모듈의 이용이 가능하고, 모듈화 특성을 개선시키며, 제작의 용이성을 쾌할 수 있다. 제안된 스위칭 기법의 기본 아이디어를 이론적으로 분석하며, 타당성을 실험을 통하여 입증한다.

특정 고조파 제거를 위한 Cascaded H-bridge 7레벨 인버터의 특성해석 및 시뮬레이션 (Analysis and simulation of Cascaded H-bridge 7 level inverter for eliminating typical harmonic waveforms)

  • 진선호;오진석;조관준;곽준호;임명규;김장목
    • 한국마린엔지니어링학회:학술대회논문집
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    • 한국마린엔지니어링학회 2005년도 전기학술대회논문집
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    • pp.1022-1028
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    • 2005
  • This paper is presented the analysis results and simulation results of cascaded H-bridge 7 level inverter with various modulation index. Stepped waveform having number of switching was used to eliminate harmonic components. Switching angles according to modulation index are calculated numerically. Therefore, 3 times of switching with 7 level topology and QWS(Quarter Wave Symmetry) could eliminate 5th and 7th harmonics. The harmonic characteristics are compared to those of space vector modulation method which known as common modulation method in industrial field. Stepped waveform method showed higher ability to reduce, especially lower order of harmonics.

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An Improved SPWM Strategy to Reduce Switching in Cascaded Multilevel Inverters

  • Dong, Xiucheng;Yu, Xiaomei;Yuan, Zhiwen;Xia, Yankun;Li, Yu
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.490-497
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    • 2016
  • The analysis of the switch status of each unit module of a cascaded multi-level inverter reveals that the working condition of the switch of a chopper arm causes unnecessary switching under the conventional unipolar sinusoidal pulse width modulation (SPWM). With an increase in the number of cascaded multilevel inverters, the superposition of unnecessary switching gradually occurs. In this work, we propose an improved SPWM strategy to reduce switching in cascaded multilevel inverters. Specifically, we analyze the switch state of the switch tube of a chopper arm of an H-bridge unit. The redundant switch is then removed, thereby reducing the switching frequency. Unlike the conventional unipolar SPWM technique, the improved SPWM method greatly reduces switching without altering the output quality of inverters. The conventional unipolar SPWM technique and the proposed method are applied to a five-level inverter. Simulation results show the superiority of the proposed strategy. Finally, a prototype is built in the laboratory. Experimental results verify the correctness of the proposed modulation strategy.

3-레벨 ANPC 인버터의 고장 허용 운전 시 중성점 전압 균형 제어 기법 (Neutral-Point Voltage Balancing Control Scheme for Fault-Tolerant Operation of 3-Level ANPC Inverter)

  • 이재운;김지원;박병건;노의철
    • 전력전자학회논문지
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    • 제24권2호
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    • pp.120-126
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    • 2019
  • This study proposes a neutral voltage balance control scheme for stable fault-tolerant operation of an active neutral point clamped (ANPC) inverter using carrier-based pulse width modulation. The proposed scheme maintains the neutral voltage balance by reconfiguring the switching combination and modulating the reference output voltage in order to solve the degradation of the output characteristic in the fault tolerant operation due to the fault of the power semiconductor switch constituting the ANPC inverter. The feasibility of the proposed control scheme is confirmed by HIL experiment using RT-BOX.

A Dual Buck Three-Level PV Grid-Connected Inverter

  • Ji, Baojian;Hong, Feng;Wang, Jianhua;Huang, Shengming
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.910-919
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    • 2015
  • The use of a PV grid-connected inverter with non-isolated topology and without a transformer is good for improving conversion efficiency; however, this inverter has become increasingly complicated for eliminating leakage current. To simplify the complicated architecture of traditional three-level dual buck inverters, a new dual Buck three-level PV grid-connected inverter topology is proposed. In the proposed topology, the voltage on the grounding stray capacitor is clamped by large input capacitors and is equal to half of the bus voltage; thus, leakage current can be eliminated. Unlike in the traditional topology, the current in the proposed topology passes through few elements and does not flow through the body diodes of MOSFET switches, resulting in increased efficiency. Additionally, a multi-loop control method that includes voltage-balancing control is proposed and analyzed. Both simulation and experimental results are demonstrated to verify the proposed structure and control method.

Differential Power Processing System for the Capacitor Voltage Balancing of Cost-effective Photovoltaic Multi-level Inverters

  • Jeon, Young-Tae;Kim, Kyoung-Tak;Park, Joung-Hu
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.1037-1047
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    • 2017
  • The Differential Power Processing (DPP) converter is a promising multi-module photovoltaic inverter architecture recently proposed for photovoltaic systems. In this paper, a DPP converter architecture, in which each PV-panel has its own DPP converter in shunt, performs distributed maximum power point tracking (DMPPT) control. It maintains a high energy conversion efficiency, even under partial shading conditions. The system architecture only deals with the power differences among the PV panels, which reduces the power capacity of the converters. Therefore, the DPP systems can easily overcome the conventional disadvantages of PCS such as centralized, string, and module integrated converter (MIC) topologies. Among the various types of the DPP systems, the feed-forward method has been selected for both its voltage balancing and power transfer to a modified H-bridge inverter that needs charge balancing of the input capacitors. The modified H-bridge multi-level inverter had some advantages such as a low part count and cost competitiveness when compared to conventional multi-level inverters. Therefore, it is frequently used in photovoltaic (PV) power conditioning system (PCS). However, its simplified switching network draws input current asymmetrically. Therefore, input capacitors in series suffer from a problem due to a charge imbalance. This paper validates the operating principle and feasibility of the proposed topology through the simulation and experimental results. They show that the input-capacitor voltages maintain the voltage balance with the PV MPPT control operating with a 140-W hardware prototype.

가역 전력변환기의 인버터 설계 (A Inverter Design of Reversible Power Converter)

  • 전중함;이현우;백수현;곽동걸
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2005년도 춘계학술대회논문집
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    • pp.8-13
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    • 2005
  • In this paper discusses single-phase DC-AC Inverter design of reversible power converter that driven by binary combination at different transformer winding ratio by BCD code level. It has a advantage that constructs a control system simply and obtain load current of good quality without filter circuit and free from noise or isolation for lower switching frequency. In this research, study on current type converter and inverter circuit that consist for possibility of AC-DC/DC-AC multi-level reversible converter.

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상보형(相補形) 트랜지스터에 의한 다중(多重) PWM 인버터에 관한 연구 (A Study on The Multi-PWM Inverter by Complementary Transistor)

  • 정연택;이종수;배상준;백종현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1989년도 하계종합학술대회 논문집
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    • pp.515-517
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    • 1989
  • This PWM inverter are used bridge circuit of two pair complementary transistor at each phase. The operation signals are 3 level PWM wave of W type and M type modulation, Which were obtained from switching time data by switching position calculation of triangular and sine wave. The output voltage waveforms of this inverter have the 5 level phase voltage and the 9 level line voltage of PWM.

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대용량 모터드라이브 적용을 위한 새로운 이중접속방식의 멀티스텝 인버터 (New Double-Connected Multi-Step Inverter for High Power Motor Drive Applications)

  • 양승욱;최규하;목형수
    • 전력전자학회논문지
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    • 제11권3호
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    • pp.209-215
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    • 2006
  • 본 논문에서는 전압원 인버터의 출력전압 파형을 개선하여 PWM방식을 사용할 수 없는 중 대용량급 모터드라이버 및 UPS, STATCOM, SVC등에 적용하기 위한 새로운 3상 전압원 24-스텝 인버터를 제안한다 보조회로로서 사용한 컨버터로 리플전압을 발생시키고 이를 기존의 12-스텝 인버터에 주입하는데 한대의 링크를 사용하면 12-스텝 동작이 24-스텝으로 전환되며 보조 변압기의 1차 권선을 2N(N=1,2,3...)으로 늘리면 12M-스텝(M=2,3,4..)으로 전환된다. 본 방식의 타당성을 실험 및 시뮬레이션을 통하여 입증하였다.

Investigations of Multi-Carrier Pulse Width Modulation Schemes for Diode Free Neutral Point Clamped Multilevel Inverters

  • Chokkalingam, Bharatiraja;Bhaskar, Mahajan Sagar;Padmanaban, Sanjeevikumar;Ramachandaramurthy, Vigna K.;Iqbal, Atif
    • Journal of Power Electronics
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    • 제19권3호
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    • pp.702-713
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    • 2019
  • Multilevel Inverters (MLIs) are widely used in medium voltage applications due to their various advantages. In addition, there are numerous types of MLIs for such applications. However, the diode-less 3-level (3L) T-type Neutral Point Clamped (NPC) MLI is the most advantageous due to its low conduction losses and high potential efficiency. The power circuit of a 3L T-type NPC is derived by the conventional two level inverter by a slight modification. In order to explore the MLI performance for various Pulse Width Modulation (PWM) schemes, this paper examines the operation of a 3L (five level line to line) T-type NPC MLI for various types of Multi-Carriers Pulse Width Modulation (MCPWM) schemes. These PWM schemes are compared in terms of their voltage profile, total harmonic distortion (THD) and conduction losses. In addition, a 3L T-type NPC MLI is also compared with the conventional NPC in terms of number of switches, clamping diodes, main diodes and capacitors. Moreover, the capacitor-balancing problem is also investigated using the Neutral Point Fluctuation (NPF) method with all of the MCPWM schemes. A 1kW 3L T-type NPC MLI is simulated in MATLAB/Simulink and implemented experimentally and its performance is tested with a 1HP induction motor. The results indicate that the 3L T-type NPC MLI has better performance than conventional NPC MLIs.