• Title/Summary/Keyword: Multi core

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Stochastic vibration response of a sandwich beam with nonlinear adjustable visco-elastomer core and supported mass

  • Ying, Z.G.;Ni, Y.Q.;Duan, Y.F.
    • Structural Engineering and Mechanics
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    • v.64 no.2
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    • pp.259-270
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    • 2017
  • The stochastic vibration response of the sandwich beam with the nonlinear adjustable visco-elastomer core and supported mass under stochastic support motion excitations is studied. The nonlinear dynamic properties of the visco-elastomer core are considered. The nonlinear partial differential equations for the horizontal and vertical coupling motions of the sandwich beam are derived. An analytical solution method for the stochastic vibration response of the nonlinear sandwich beam is developed. The nonlinear partial differential equations are converted into the nonlinear ordinary differential equations representing the nonlinear stochastic multi-degree-of-freedom system by using the Galerkin method. The nonlinear stochastic system is converted further into the equivalent quasi-linear system by using the statistic linearization method. The frequency-response function, response spectral density and mean square response expressions of the nonlinear sandwich beam are obtained. Numerical results are given to illustrate new stochastic vibration response characteristics and response reduction capability of the sandwich beam with the nonlinear visco-elastomer core and supported mass under stochastic support motion excitations. The influences of geometric and physical parameters on the stochastic response of the nonlinear sandwich beam are discussed, and the numerical results of the nonlinear sandwich beam are compared with those of the sandwich beam with linear visco-elastomer core.

Analytical Approach to Compression and Shear Characteristics of the Unit Cell of PCM Core with Pyramidal Configuration (피라미드 형상의 PCM 코어 단위 셀의 압축 및 전단특성에 관한 해석적 연구)

  • Kim, S.W.;Jung, H.C.;Lee, Y.S.;Kang, B.S.
    • Transactions of Materials Processing
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    • v.19 no.7
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    • pp.411-415
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    • 2010
  • A sandwich panel which is comprised of truss cores faced with solid face sheets is lightweight and multi-functional. So it is widely used to not only structural material but also heat transfer media in transportation field such as airplane, train and vessel. There are various core topologies such as pyramidal and tetrahedral truss, square honeycombs and kagome truss. The study focused on analytical approach to optimize compression and shear quality of the unit cell of PCM with pyramidal configuration. With various unit cell models which have the same core weight per unit area but different truss member angle, analytical solution for effective stress ($\bar{\sigma},\bar{\tau}$), peak stress ($\bar{\sigma}_{peak},\bar{\tau}_{peak}$) by yielding and buckling, relative density ($\bar{\rho}_c$) and effective stiffness ($\bar{E},\bar{G}$) have been computed and compared each other. With this approach, the most optimal core configuration was predicted. The result has become the efficient guidelines for the design of PCM core structure.

User Experience Assisted Energy-Efficient Software Design for Mobile Devices on the big.LITTLE Core Architecture (사용자 경험을 기반으로 big.LITTLE 멀티코어 구조의 스마트 모바일 단말의 에너지 소비를 최적화 하는 소프트웨어 구조 설계)

  • Lim, Sung-Hwa
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.1
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    • pp.23-28
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    • 2020
  • In Smart mobile devices embedding big.LITTLE architectures, the conventional multi-core assignment scheme for user applications may incur wasteful energy consumption and long response time. In this paper, we propose a user experience assisted energy-efficient multicore assignment scheme. Our simulation results show that the proposed scheme achieves at 40% less energy consumption and at 20% less response time comparing to the legacy scheme.

Canard Type Aircraft Structural Test (선미익형 항공기 구조시험)

  • Kim, Jin-Won;Ahn, Soek-Min;Jung, Do-Hee;Song, Byung-Heum
    • Journal of the Korean Society for Aviation and Aeronautics
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    • v.13 no.3
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    • pp.97-109
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    • 2005
  • A canard type aircraft, which has good wing stall and stall/spin-proof characteristics, is under development. The aircraft prototype has full-depth core sandwich type wing and fixed landing gear, and has been built for test flights. Newly developing aircraft will be equipped with retractable landing gear and conventional foam core sandwich laminate structures and multi-rib wings. In this study, we present the structural test procedure and result for aircraft Firefly.

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Numerical Analysis of Welding Residual Stresses for Ultra-thick Plate of EH40 TM and API 2W Gr.50 Steel Joined by Flux Core Arc Welding (EH40과 API2W강재의 극 후판재 다층 FCAW 버트 접합부 잔류응력해석)

  • Hwang, Se-Yun;Lee, Jang-Hyun;Yang, Young-Sik;Lee, Sung-Je;Kim, Byung-Jong
    • Journal of Welding and Joining
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    • v.28 no.3
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    • pp.65-72
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    • 2010
  • Some structural members of large-scale marine vessels such as large-scale offshore structures and very large container ships are assembled by very thick plates of which thickness exceeds 60mm. Also, high-tensile steels have been selected to meet the required structural strength and fatigue strength. Generally, multi-pass welding method such as FCA(Flux-Core Arc) welding has been used to join the thick plates. Considering the welding residual stresses, fatigue strength of the welded joints of thick plates should be assured since the residual stress influences the fatigue strength. This paper presents a numerical procedure to investigate the residual stress of structure joined by multi-pass FCA welding so that it can be incorporated into the fatigue strength assessment considering the effect of welding residual stress. The residual stress distribution is also measured by X-Ray diffraction method. The residual stress obtained by the computational model also has been compared with that of experiment. The results of FEA are in very good agreement with the experimental measurements.

Performance Comparison between Hardware & Software Cache Partitioning Techniques (하드웨어 캐시 파티셔닝과 소프트웨어 캐시 파티셔닝의 성능 비교)

  • Park, JiWoong;Yeom, HeonYoung;Eom, Hyeonsang
    • Journal of KIISE
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    • v.42 no.2
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    • pp.177-182
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    • 2015
  • The era of multi-core processors has begun since the limit of the clock speed has been reached. These days, multi-core technology is used not only in desktops, servers, and table PCs, but also in smartphones. In this architecture, there is always interference between processes, because of the sharing of system resources. To address this problem, cache partitioning is used, which can be roughly divided into two types: software and hardware cache partitioning. When it comes to dynamic cache partitioning, hardware cache partitioning is superior to software cache partitioning, because it needs no page copy. In this paper, we compare the effectiveness of hardware and software cache partitioning on the AMD Opteron 6282 SE, which is the only commodity processor providing hardware cache partitioning, to see whether this technique can be effectively deployed in dynamic environments.

An Optimization Tool for Determining Processor Affinity of Networking Processes (통신 프로세스의 프로세서 친화도 결정을 위한 최적화 도구)

  • Cho, Joong-Yeon;Jin, Hyun-Wook
    • KIPS Transactions on Software and Data Engineering
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    • v.2 no.2
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    • pp.131-136
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    • 2013
  • Multi-core processors can improve parallelism of application processes and thus can enhance the system throughput. Researchers have recently revealed that the processor affinity is an important factor to determine network I/O performance due to architectural characteristics of multi-core processors; thus, many researchers are trying to suggest a scheme to decide an optimal processor affinity. Existing schemes to dynamically decide the processor affinity are able to transparently adapt for system changes, such as modifications of application and upgrades of hardware, but these have limited access to characteristics of application behavior and run-time information that can be collected heuristically. Thus, these can provide only sub-optimal processor affinity. In this paper, we define meaningful system variables for determining optimal processor affinity and suggest a tool to gather such information. We show that the implemented tool can overcome limitations of existing schemes and can improve network bandwidth.

Optimal Design Space Exploration of Multi-core Architecture for Real-time Lane Detection Algorithm (실시간 차선인식 알고리즘을 위한 최적의 멀티코어 아키텍처 디자인 공간 탐색)

  • Jeong, Inkyu;Kim, Jongmyon
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.7 no.3
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    • pp.339-349
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    • 2017
  • This paper proposes a four-stage algorithm for detecting lanes on a driving car. In the first stage, it extracts region of interests in an image. In the second stage, it employs a median filter to remove noise. In the third stage, a binary algorithm is used to classify two classes of backgrond and foreground of an input image. Finally, an image erosion algorithm is utilized to obtain clear lanes by removing noises and edges remained after the binary process. However, the proposed lane detection algorithm requires high computational time. To address this issue, this paper presents a parallel implementation of a real-time line detection algorithm on a multi-core architecture. In addition, we implement and simulate 8 different processing element (PE) architectures to select an optimal PE architecture for the target application. Experimental results indicate that 40×40 PE architecture show the best performance, energy efficiency and area efficiency.

Hybrid Transactional Memory using Sampling-based Retry Policy in Multi-Core Environment (멀티코어 환경에서 샘플링 기반 재시도 정책을 이용한 하이브리드 트랜잭셔널 메모리)

  • Kang, Moon-Hwan;Jang, Yeon-Woo;Yoon, Min;Chang, Jae-Woo
    • The Journal of Korean Institute of Next Generation Computing
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    • v.13 no.2
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    • pp.49-61
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    • 2017
  • Transactional Memory (TM) has greatly changed the parallel programming paradigm for transaction processing and is classified into STM, HTM, HyTM according to hardware or software frameworks. However, the existing studies have a problem that they provide static retry policy for all workloads. To solve the problems, we propose an hybrid transactional memory scheme using sampling-based adaptive retry policy in multi-core environment. First, the proposed scheme determines whether to use STM or HTM according to the characteristic of a transaction. Otherwise, it executes HTM and STM concurrently by using a bloom filter. Second, the proposed scheme provides adaptive retry policy for HTM according to the characteristic of transactions in each workload. Finally, through the experimental performance evaluation using STAMP, the proposed scheme shows 10~20% better performance than the existing schemes.

ADVANCES IN MULTI-PHYSICS AND HIGH PERFORMANCE COMPUTING IN SUPPORT OF NUCLEAR REACTOR POWER SYSTEMS MODELING AND SIMULATION

  • Turinsky, Paul J.
    • Nuclear Engineering and Technology
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    • v.44 no.2
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    • pp.103-122
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    • 2012
  • Significant advances in computational performance have occurred over the past two decades, achieved not only by the introduction of more powerful processors but the incorporation of parallelism in computer hardware at all levels. Simultaneous with these hardware and associated system software advances have been advances in modeling physical phenomena and the numerical algorithms to allow their usage in simulation. This paper presents a review of the advances in computer performance, discusses the modeling and simulation capabilities required to address the multi-physics and multi-scale phenomena applicable to a nuclear reactor core simulator, and present examples of relevant physics simulation codes' performances on high performance computers.