• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.2
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• pp.409-416
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• 1996

This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

• Journal of KIISE:Software and Applications
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• v.27 no.1
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• pp.1-12
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• 2000

Model checking is a formal verification technique which checks the consistency between a requirement specification and a behavior model of the system by explorating the state space of the model. We apply model checking to the formal verification of the concurrent object-oriented system, using an existing model checker SPIN which has been successful in verifying concurrent systems. First, we propose an Actor-based modeling language, called APromela, by extending the modeling language Promela which is a modeling language supported in SPIN. APromela supports not only all the primitives of Promela, but additional primitives needed to model concurrent object-oriented systems, such as class definition, object instantiation, message send, and synchronization.Second, we provide translation rules for mapping APromela's such modeling primitives to Promela's. As an application of APromela, we suggest a verification method for UML models. By giving an example of specification, translation, and verification, we also demonstrate the applicability of our proposed approach, and discuss the limitations and further research issues.

• Water for future
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• v.28 no.6
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• pp.193-202
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• 1995

The subjective research attempts to apply a rainfall-runoff model capable of considering time-variation of soil water contents which are highly correlated to the river flows on the qpqyungchang river basin and to evaluate its performance for flow forecasting. The model used in this study is a physically-based conceptual time-continuous model, which is composed of the Sacramento soil moisture accounting model and the nonlinear multiple conceptual reservoirs model. The daily precipitation and evaporation data for 7 years and for 3 years were used for the parameter estimation and the model verification, respectively. As a result, the flows including a significant flood event were well simulated, and the cross-correlation coefficient between observed flows and computed flows for the verification periods was 0.87, but in general computed flows were underestimated for the low-flow periods. Also, the effects of precipitation and soil water content to the river flows were analysed for the flood and the drought.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.3
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• pp.72-78
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• 2000

In this study, we propose a model verification algorithm based on DCT and neural network for ATM security system. We construct database about facial images after capturing thirty persons facial images in the same lumination and distance. To simulate model verification, we capture four learning images and test images per a man. After detecting edge in facial images, we detect a characteristic area of square shape using edge distribution in facial images. Characteristic area contains eye bows, eyes, nose, mouth and cheek. We extract characteristic vectors to calculate diagonally coefficients sum after obtaining DCT coefficients about characteristic area. Characteristic vectors is normalized between +1 and -1, and then used for input vectors of neural networks. Not considering passwords, simulations results showed 100% verification rate when facial images were learned and 92% verification rate when facial images weren't learned. But considering passwords, the proposed algorithm showed 100% verification rate in case of two simulations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.12
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• pp.2298-2304
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• 2017

Online signature verification is one of the simple and efficient method of identity verification and has less resistance than other biometric technologies. In training to build a verification model, negative samples are required to build the model, but in most practical applications it is not easy to get negative samples - forgery signatures. In this paper, proposed is a method using someone else's signatures as negative samples. In verification, shape-based features extracted from the time-sequenced signature data are extracted and a support vector machine is used to verify. SVM tries to map a feature vector to a high dimensional space and to draw a linear boundary in the high dimensional space. SVM is one of the best classifiers and has been applied to various applications. Using general handwriting data, i.e., someone else's signatures which have little in common with positive samples improved the verification rate experimentally, which means that signature verification without negative samples is possible.

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.4
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• pp.274-279
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• 2009

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In this paper, verification environments based-on SystemVerilog and SystemC, one is native-code co-verification environment which makes prompt functional verification possible and another is SystemVerilog layered testbench which makes clock-level verification possible, are implemented. In native-code co-verification, HW and SW parts of SoC are respectively designed with SystemVerilog and SystemC after HW/SW partitioning using SystemC, then the functional interaction between HW and SW parts is carried out as one simulation process. SystemVerilog layered testbench is a verification environment including corner case test of DUT through the randomly generated test-vector. We adopt SystemC to design a component of verification environment which has multiple inheritance, and we combine SystemC design unit with the SystemVerilog layered testbench using SystemVerilog DPI and ModelSim macro. As multiple inheritance is useful for creating class types that combine the properties of two or more class types, the design of verification environment adopting SystemC in this paper can increase the code reusability.

• The Transactions of the Korea Information Processing Society
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• v.3 no.1
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• pp.77-86
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• 1996

In managing a certain database, the integrity of data is very important. The important. The integrity constrains thus should be considered carefully when a database is designed and, after the database is created, it is required for a database manager to check continuously if some data contained in the database violate the integrity constraints considered. It is however not easy to check the violateion of integrity constraints when the size and the complexity of database are increased. This paper suggests a rule-based database verification system to relax the difficulty of checking the integrity violation, in which a database is coupled with a rule-based system including the knowledge about the integrity constraints. The rule-database verification system suggested accepts the model descriptions of an application domain, generates the knowledge base consisting of rules and facts by analyzing the model description and proceeds the verification process to check the integrity of the database.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2083-2088
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• 2015

The transient characteristics of the tri-axial High Temperature Superconducting (HTS) power cable are different from those of a conventional power cable depending on whether the cable is under a steady or transient state due to the quench. Verification using simulation tools is required to confirm both the characteristics of the cable and the effect of the cable when it is applied to a real utility. However, a component for the cable has not been provided in simulation tools; thus the RTDS-based model component of the tri-axial HTS power cable was developed, and a simulation was performed under the transient state. The considered properties of model component include resistance, reactance and temperature. Simulation results indicate the variation of HTS power cable condition. The results are used for the transient characteristic analysis and stability verification of the tri-axial HTS power cable. In the future, the RTDS-based model component of the cable will be used to implement the hardware-in-the-loop simulation with a protection device.

• The Journal of the Acoustical Society of Korea
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• v.28 no.3
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• pp.279-284
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• 2009

Speaker verification determines whether the claimed speaker is accepted based on the score of the test utterance. In recent years, methods based on Gaussian mixture models and universal background model have been the dominant approaches for text-independent speaker verification. These speaker verification systems based on these methods provide very good performance under laboratory conditions. However, in real situations, the performance of speaker verification system is degraded dramatically. For overcoming this performance degradation, the feature recombination method was proposed, but this method had a drawback that whole sub-band feature vectors are used to compute the likelihood scores. To deal with this drawback, a modified feature recombination method which can use each sub-band likelihood score independently was proposed in our previous research. In this paper, we propose a sub-band weighting method based on sub-band signal-to-noise ratio which is combined with previously proposed modified feature recombination. This proposed method reduces errors by 28% compared with the conventional feature recombination method.

• Journal of Internet Computing and Services
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• v.10 no.4
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• pp.139-149
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• 2009

In order to verify that a lot of legal requirements and regulations are correctly translated into software, this paper provides a solution for formal and computable representations of rules and requirements in data protection legislations with a DSML (Domain Specific Modeling Language). All policies are formally specified through Prolog and then integrated with DSML, According to the time of policy verification, this solution has two kinds of policies: static policies, dynamic policies.