• Title/Summary/Keyword: Mode reduction

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Design and Implementation of OFDM Frequency Offset Synchronization Block Using CORDIC (CORDIC을 이용한 OFDM 주파수 옵셋 동기부 설계 및 구현)

  • Jang, Young-Beom;Han, Jae-Woong;Hong, Dae-Ki
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.5
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    • pp.118-125
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    • 2008
  • In this paper, an efficient frequency offset synchronization structure for OFDM(Orthogonal Frequency Division Multiplexing) is proposed. Conventional CORDIC(Coordinate Rotation Digital Computer) algorithm for frequency offset synchronization utilizes two CORDIC hardware i.e., one is vector mode for phase estimation, the other is rotation mode for compensation. But proposed structure utilizes one CORDIC hardware and divider. Through simulation, it is shown that hardware implementation complexity is reduced compared with conventional structures. The Verilog-HDL coding and front-end chip implementation results for the proposed structure show 22.1% gate count reduction comparison with those of the conventional structure.

The Reduction of Common-Mode Voltage in Matrix Converter without Using Zero Space Vector (영상태 벡터를 사용하지 않는 매트릭스 컨버터의 공통모드 전압 저감에 관한 연구)

  • Nguyen, Minh-Hoang;Lee, Hong-Hee;Jung, Eui-Heon;Chun, Tae-Won;Kim, Heung-Geun
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.638-642
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    • 2005
  • This paper proposes a modified space-vector pulse width modulation (PWM) strategy which can restrict the common-mode voltage for three-phase to three-phase matrix converter and still keep sinusoidal input and output waveforms and unity power factor at the input side. The proposed control method has been developed based on contributing the appropriate space vectors instead of using zero space vectors. The advantages of this proposed method is to reduce the peak value of common-mode voltage to 42% beside the lower high harmonic components as compared to the conventional SVM method. Hence, the new table is also presented with the new space vector rearrangement. Furthermore, the voltage transfer ratio is unaffected by the proposed method. A simulation of the overall system has been carried out to validate the advantages of the proposed method.

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Computer Simulation of an Automotive Engine Cooling System (자동차 엔진 냉각시스템의 컴퓨터 시뮬레이션)

  • 원성필;윤종갑
    • Transactions of the Korean Society of Automotive Engineers
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    • v.11 no.4
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    • pp.58-67
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    • 2003
  • An automotive engine cooling system is closely related with overall engine performances, such as reduction of fuel consumption, decrease of air pollution, and increase of engine life. Because of complex reaction between each component, the direct experiment, using a vehicle, takes high cost, long time, and slow response to the system change. Therefore, a computer simulation would provide the designer with an inexpensive and effective tool for design, development, and optimization of the engine cooling system over a wide range of operating conditions. In this work, it has been predicted the thermal performance of the engine cooling system in cases of stationary mode, constant speed mode, and city-drive mode by mathematical modelling of each component and numerical analysis. The components are engine, radiator, heater, thermostat, water pump, and cooling fans. Since the engine model is the most important, that is divided into eight sub-sections. The volume mean temperature of eight sub-sections are simultaneously calculated at a time. For detail calculation, the radiator and heater are also divided into many sub-sections like control volumes in finite difference method. Each sub-section is assumed to consist of three parts, coolant, tube with fin, and air. Hence it has been developed the simulation program that can be used in case of design and system configuration changes. The overall performance results obtained by the program were desirable and the time-traced tendencies of the results agreed fairly well with those of actual situations.

Common-mode Voltage Reduction for Inverters Connected in Parallel Using an MPC Method with Subdivided Voltage Vectors

  • Park, Joon Young;Sin, Jiook;Bak, Yeongsu;Park, Sung-Min;Lee, Kyo-Beum
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1212-1222
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    • 2018
  • This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

Parameter Analysis of Rotor Shape Modification for Reduction of Squeal Noise (브레이크의 스퀼 저감을 위한 로터 형상변경 파라메터 해석)

  • Lee, Hyun-Young;Oh, Jae-Eung;Cha, Byeong-Gyu;Joe, Yong-Goo;Lee, Jung-Youn
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2004.11a
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    • pp.820-825
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    • 2004
  • This paper deals with friction-induced vibration of disc brake system under constant friction coefficient. A linear, finite element parameter model to represent the floating caliper disc brake system is proposed. The complex eigenvalues are used to investigate the dynamic stability and in order to verify simulations which are based on the FEM model, the experimental modal test and the dynamometer test are performed. The comparison of experimental and simulation results shows a good agreement and the analysis indicates that mode coupling due to friction force is responsible for disc brake squeal. And squeal type instability is investigated by using the parametric rotor simulation. This indicates parameters which have influence on the propensity of brake squeal. This helped to validate the FEM model and establish confidence in the simulation results. Also they may be useful during real disk brake model.

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High Efficiency and Small Size Switch Mode Line Transformer(SMLT) (고효율 및 소형 스위치모드 라인 트랜스포머)

  • Kim, Jin-Hong;Yang, Jung-Woo;Jang, Du-Hee;Kang, Jeong-Il;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.4
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    • pp.237-243
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    • 2019
  • A high-efficiency and small-sized switched-mode line transformer (SMLT) is proposed in this study. The conventional structure of an adapter is composed of line transformer and rectifiers. This structure has a limit in miniaturizing due to low-frequency line transformer. Another structure is composed of power factor correction (PFC) and DC/DC converter. This structure has a limit in reducing volume due to two-stage structure. As the proposed SMLT is composed of an LLC resonant converter, a high-frequency transformer can be adopted to achieve isolation standards and size reduction. This proposed structure has different operation modes in accordance with line input voltage to overcome poor line regulation. In addition, the proposed SMLT is applied to the front of a conventional PFC converter, because the SMLT output voltage is restored to rectified sinusoidal wave by using a full-bridge rectifier in the secondary side. The design of the PFC converter is easy, because the SMLT output voltage is controlled as rectified sinusoidal wave. The validity of the proposed converter is proven through a 350 W prototype.

Optimal Design of GaN-FET based High Efficiency and High Power Density Boundary Conduction Mode Active Clamp Flyback Converter (GaN-FET 기반의 고효율 및 고전력밀도 경계전류모드 능동 클램프 플라이백 컨버터 최적설계)

  • Lee, Chang-Min;Gu, Hyun-Su;Ji, Sang-Keun;Ryu, Dong-Kyun;Kang, Jeong-Il;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.4
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    • pp.259-267
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    • 2019
  • An active clamp flyback (ACF) converter applies a clamp circuit and circulates the energy of leakage inductance to the input side, thereby achieving a zero-voltage switching (ZVS) operation and greatly reducing switching losses. The switching losses are further reduced by applying a gallium nitride field effect transistor (GaN-FET) with excellent switching characteristics, and ZVS operation can be accomplished under light load with boundary conduction mode (BCM) operation. Optimal design is performed on the basis of loss analysis by selecting magnetization inductance based on BCM operation and a clamp capacitor for loss reduction. Therefore, the size of the reactive element can be reduced through high-frequency operation, and a high-efficiency and high-power-density converter can be achieved. This study proposes an optimal design for a high-efficiency and high-power-density BCM ACF converter based on GaN-FETs and verifies it through experimental results of a 65 W-rated prototype.

EMC Debugging Technique for Image Equipments (영상기기의 EMC Debugging 기술)

  • Song, Min-jong;Kim, Jin-Sa
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.2
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    • pp.143-148
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    • 2022
  • For the purpose of treating health checkups and recovery of patients in a super-aged society, hospitals use devices designed with a reduction circuit of electromagnetic waves associated with the specific absorption rate of electromagnetic waves absorbed by the human body. In this paper, we proposed a filter improvement design method capable of reducing electromagnetic waves. As a result of confirming the validity of the proposed technique through simulation and experimental results, the following result values were obtained. Applying the common-mode (CM) inductor 4 mH to a calibration circuit, noise decreased in a multiband spectrum. Using the differential mode(DM) inductor 40 µH element in the primary calibration circuit, the noise decreased by 15 dB or more in the 3 MHz band spectrum. Also, applying the Admittance Capacitance (Y-Cap) 10 nF element in the secondary calibration circuit resulted in the decrease by more than 30 dB in the band spectrum before 2 MHz. After using a common-mode inductor 4 mH element in the tertiary calibration circuit, it decreased by more than 15 dB in the band spectrum after 2 MHz.

An Efficient Hardware Architecture of Intra Prediction and TQ/IQIT Module for H.264 Encoder

  • Suh, Ki-Bum;Park, Seong-Mo;Cho, Han-Jin
    • ETRI Journal
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    • v.27 no.5
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    • pp.511-524
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    • 2005
  • In this paper, we propose a novel hardware architecture for an intra-prediction, integer transform, quantization, inverse integer transform, inverse quantization, and mode decision module for the macroblock engine of a new video coding standard, H.264. To reduce the cycle of intra prediction, transform/quantization, and inverse quantization/inverse transform of H.264, a reduction method for cycle overhead in the case of I16MB mode is proposed. This method can process one macroblock for 927 cycles for all cases of macroblock type by processing $4{\times}4$ Hadamard transform and quantization during $16{\times}16$ prediction. This module was designed using Verilog Hardware Description Language (HDL) and operates with a 54 MHz clock using the Hynix $0.35 {\mu}m$ TLM (triple layer metal) library.

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Analysis of continuous conduction mode boost power-factor-correction circuit (부스트 방식 역률개선회로의 설계와 특성분석)

  • Kim, Cherl-Jin;Jang, Jun-Young;Kim, Sang-Duck;Song, Yo-Chang;Yoon, Shin-Yang
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.1120-1122
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    • 2002
  • Switching power supply are widely used in many industrial field. Power factor improvement and harmonic reduction technique is very important in switching power supply. The power factor correction (PFC) circuit using boost converter used in input of power source is studied in this paper. It is analyzed distortional situations and harmonics of input currents that presented at continuous conduction mode(CCM) of boost PFC circuit. It is done simulations of harmonics distribution according to load variation by using PSPICE and MATLAB. From the actual experiment of boost PFC circuit the validity of the analysis is confirmed.

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