• Title/Summary/Keyword: Mode Complexity

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Relative SATD-based Minimum Risk Bayesian Framework for Fast Intra Decision of HEVC

  • Gwon, Daehyeok;Choi, Haechul
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.1
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    • pp.385-405
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    • 2019
  • High Efficiency Video Coding (HEVC) enables significantly improved compression performance relative to existing standards. However, the advance also requires high computational complexity. To accelerate the intra prediction mode decision, a minimum risk Bayesian classification framework is introduced. The classifier selects a small number of candidate modes to be evaluated by a rate-distortion optimization process using the sum of absolute Hadamard transformed difference (SATD). Moreover, the proposed method provides a loss factor that is a good trade-off model between computational complexity and coding efficiency. Experimental results show that the proposed method achieves a 31.54% average reduction in the encoding run time with a negligible coding loss of 0.93% BD-rate relative to HEVC test model 16.6 for the Intra_Main common test condition.

Fast Mode Decision Algorithm for H.264 using Mode Classification (H.264 표준에서 모드 분류를 이용한 고속 모드결정 방법)

  • Kim, Hee-Soon;Ho, Yo-Sung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.3
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    • pp.88-96
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    • 2007
  • H.264 is a new international video coding standard that can achieve considerably higher coding efficiency than conventional standards. Its coding gain has been achieved by employing advanced video coding methods. Specially, the increased number of macroblock modes and the complex mode decision procedure using the Lagrangian optimization are the main factors for increasing coding efficiency. Although H.264 obtains improved coding efficiency, it is difficult to do an real-time encoding because it considers all coding parameters in the mode decision procedure. In this paper, we propose a fast mode decision algorithm which classifies the macroblock modes in order to determine the optimal mode having low complexity quickly. Simulation results show that the proposed algorithm can reduce the encoding time by 34.95% on average without significant PSNR degradation or bit-rate increment. In addition, in order to show the validity of simulation results, we set up a low boundary condition for coding efficiency and complexity and show that the proposed algorithm satisfies the low boundary condition.

Performance Evaluation of Ethernet Frame Burst Mode in EPON Downstream Link

  • Jia, Wen-Kang;Chen, Yaw-Chung
    • ETRI Journal
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    • v.30 no.2
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    • pp.290-300
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    • 2008
  • We apply IEEE 802.3 frame burst mode (FBM) to the Ethernet passive optical network (EPON) downstream link and compare its performance with non-frame burst mode for various traffic patterns. Although in light traffic loads (p<0.5) the efficiency of the FBM mechanism is not significant, it does feature high throughput, small jitter, low queue occupancy, and short queuing delay in optical line terminals under various traffic loads with various numbers of optical network units (ONUs). The FBM performance always approaches that of full-duplex mode, especially under heavy traffic loads (p>0.5). Moreover, an increase in number of ONUs will decrease the burst performance. Our work shows that FBM scheme is very useful for EPON transmission and has low design complexity.

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Efficient Intra Modes for Fast Intra Mode Decision of H.264/AVC (H.264/AVC의 고속 인트라 모드 결정을 위한 효과적인 인트라 모드)

  • Lee Woong-ho;Lee Jung-ho;Cho Ik-Hwan;Jeong Dong-Seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.12C
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    • pp.1144-1152
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    • 2005
  • Intra prediction coding is one of the many coding-efficiency oriented tools of H.264/AVC, but it requires high computational complexity. Many fast intra coding algorithms have been proposed to reduce the computational complexity of intra prediction. While most of them have been focused on the mode decision methods themselves, we propose a fast algorithm in which new intra modes are substituted for the conventional intra modes so that the number of intra modes can be reduced. The simulation results show that the proposed method could reduce the encoding time of the overall sequence by $49\%$ without any noticeable degradation of the coding efficiency.

Scheme for Reducing HEVC Intra Coding Complexity Considering Video Resolution and Quantization Parameter (비디오 해상도 및 양자화 파라미터를 고려한 HEVC의 화면내 부호화 복잡도 감소 기법)

  • Lee, Hong-Rae;Seo, Kwang-Deok
    • Journal of Broadcast Engineering
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    • v.19 no.6
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    • pp.836-846
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    • 2014
  • To expedite UHD (Ultra High Definition) video service, the HEVC (High-Efficiency Video Coding) technology has recently been standardized and it achieves two times higher compression efficiency than the conventional H.264/AVC. To obtain the improved efficiency, however, it employs many complex methods which need complicated calculation, thereby resulting in a significantly increased computational complexity when compared to that of H.264/AVC. For example, to improve the coding efficiency of intra frame coding, up to 35 intra prediction modes are defined in HEVC, but this results in an increased encoding time than the H.264/AVC. In this paper, we propose a fast intra prediction mode decision scheme which reduces computational complexity by changing the number of intra prediction mode in accordance with the percentage of PU sizes for a given video resolution, and by classifying the 35 intra prediction modes into 4 categories considering video resolution and quantization parameter. The experimental results show that the total encoding time is reduced by about 7% on average at the cost of only 2% increase in BD-rate.

Fast mode decision by skipping variable block-based motion estimation and spatial predictive coding in H.264 (H.264의 가변 블록 크기 움직임 추정 및 공간 예측 부호화 생략에 의한 고속 모드 결정법)

  • 한기훈;이영렬
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.417-425
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    • 2003
  • H.264, which is the latest video coding standard of both ITU-T(International Telecommunication Union-Telecommunication standardization sector) and MPEG(Moving Picture Experts Group), adopts new video coding tools such as variable block size motion estimation, multiple reference frames, quarter-pel motion estimation/compensation(ME/MC), 4${\times}$4 Integer DCT(Discrete Cosine Transform), and Rate-Distortion Optimization, etc. These new video coding tools provide good coding of efficiency compared with existing video coding standards as H.263, MPEG-4, etc. However, these new coding tools require the increase of encoder complexity. Therefore, in order to apply H.264 to many real applications, fast algorithms are required for H.264 coding tools. In this paper, when encoder MacroBlock(MB) mode is decided by rate-distortion optimization tool, fast mode decision algorithm by skipping variable block size ME/MC and spatial-predictive coding, which occupies most encoder complexity, is proposed. In terms of computational complexity, the proposed method runs about 4 times as far as JM(Joint Model) 42 encoder of H.264, while the PSNR(peak signal-to-noise ratio)s of the decoded images are maintained.

Design of Low-Complexity 128-Bit AES-CCM* IP for IEEE 802.15.4-Compatible WPAN Devices (IEEE 802.15.4 호환 WPAN 기기를 위한 낮은 복잡도를 갖는128-bit AES-CCM* IP 설계)

  • Choi, Injun;Lee, Jong-Yeol;Kim, Ji-Hoon
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.45-51
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    • 2015
  • Recently, as WPAN (Wireless Personal Area Network) becomes the necessary feature in IoT (Internet of Things) devices, the importance of data security also hugely increases. In this paper, we present the low-complexity 128-bit AES-$CCM^*$ hardware IP for IEEE 802.15.4 standard. For low-cost and low-power implementation which is essentially required in IoT devices, we propose two optimization methods. First, the folded AES(Advanced Encryption Standard) processing core with 8-bit datapath is presented where composite field arithmetic is adopted for reduced hardware complexity. In addition, to support $CCM^*$ mode defined in IEEE 802.15.4, we propose the mode-toggling architecture which requires less hardware resources and processing time. With the proposed methods, the gate count of the proposed AES-$CCM^*$ IP can be lowered up to 57% compared to the conventional architecture.

Fast Mode Decision using Block Size Activity for H.264/AVC (블록 크기 활동도를 이용한 H.264/AVC 부호화 고속 모드 결정)

  • Jung, Bong-Soo;Jeon, Byeung-Woo;Choi, Kwang-Pyo;Oh, Yun-Je
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.2 s.314
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    • pp.1-11
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    • 2007
  • H.264/AVC uses variable block sizes to achieve significant coding gain. It has 7 different coding modes having different motion compensation block sizes in Inter slice, and 2 different intra prediction modes in Intra slice. This fine-tuned new coding feature has achieved far more significant coding gain compared with previous video coding standards. However, extremely high computational complexity is required when rate-distortion optimization (RDO) algorithm is used. This computational complexity is a major problem in implementing real-time H.264/AVC encoder on computationally constrained devices. Therefore, there is a clear need for complexity reduction algorithm of H.264/AVC such as fast mode decision. In this paper, we propose a fast mode decision with early $P8\times8$ mode rejection based on block size activity using large block history map (LBHM). Simulation results show that without any meaningful degradation, the proposed method reduces whole encoding time on average by 53%. Also the hybrid usage of the proposed method and the early SKIP mode decision in H.264/AVC reference model reduces whole encoding time by 63% on average.

Fast PU Decision Method Using Coding Information of Co-Located Sub-CU in Upper Depth for HEVC (상위깊이의 Sub-CU 부호화 정보를 이용한 HEVC의 고속 PU 결정 기법)

  • Jang, Jae-Kyu;Choi, Ho-Youl;Kim, Jae-Gon
    • Journal of Broadcast Engineering
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    • v.20 no.2
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    • pp.340-347
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    • 2015
  • HEVC (High Efficiency Video Coding) achieves high coding efficiency by employing a quadtree-based coding unit (CU) block partitioning structure and various prediction units (PUs), and the determination of the best CU partition structure and the best PU mode based on rate-distortion (R-D) cost. However, the computation complexity of encoding also dramatically increases. In this paper, to reduce such encoding computational complexity, we propose three fast PU mode decision methods based on encoding information of upper depth as follows. In the first method, the search of PU mode of the current CU is early terminated based on the sub-CBF (Coded Block Flag) of upper depth. In the second method, the search of intra prediction modes of PU in the current CU is skipped based on the sub-Intra R-D cost of upper depth. In the last method, the search of intra prediction modes of PU in the lower depth's CUs is skipped based on the sub-CBF of the current depth's CU. Experimental results show that the three proposed methods reduce the computational complexity of HM 14.0 to 31.4%, 2.5%, and 23.4% with BD-rate increase of 1.2%, 0.11%, and 0.9%, respectively. The three methods can be applied in a combined way to be applied to both of inter prediction and intra prediction, which results in the complexity reduction of 34.2% with 1.9% BD-rate increase.

A Design for Extension Codec based on Legacy Codec (레거시 코덱 기반 확장 코덱 설계)

  • Young, Su Heo;Bang, Gun;Park, Gwang Hoon
    • Journal of Broadcast Engineering
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    • v.20 no.4
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    • pp.509-520
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    • 2015
  • A design for the merge mode of three dimensional High Efficiency Video Coding (3D-HEVC) is proposed in this paper. The proposed design can reduce the implementation complexity by removing the duplicated modules of the HEVC. For the extension codec, the implementation complexity is as crucial as coding efficiency, meaning if possible, extension codec needs to be easily implemented through by reusing the design of the legacy codec as-is. However, the existing merging process of 3D-HEVC had been built-in integrated in the inside of the HEVC merging process. Thus the duplicated merging process of HEVC had to be fully re-implemented in the 3D-HEVC. Consequently the implementation complexity of the extension codec was very high. The proposed 3D-HEVC merge mode is divided into following two stages; the process to reuse the HEVC modules without any modification; and the reprocessing process for newly added and modified merging modules in 3D-HEVC. By applying the proposed method, the re-implemented HEVC modules, which accounted for 51.4% of 3D-HEVC merge mode confirmed through the operational analysis of algorithm, can be eliminated, while maintaining the same coding efficiency and computational complexity.