• JSTS:Journal of Semiconductor Technology and Science
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• 제4권4호
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• pp.269-274
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• 2004

Current delivery system, in which the analog current produced by a unique DAC circuit is stored into a current-memory circuit and delivered in a time-divided sequence, shows variation of output current as low as 4% in a current source data-driver IC for AM-OLED driven by a current-programmed method without any fuse repairing after fabrication. This driver IC has 54 outputs and can sink constant current as low as 3 ${\mu}A$ with 6-bit analog levels. Such a low current level without variation can hardly be obtained by an ordinary MOS transistor because the current level is in the sub-threshold region and changes exponentially with threshold voltage variation. Thus we adopted a current mirror circuit composed of bipolar transistors to supply well-controlled current within a nano-ampere range.

• 한국기계가공학회지
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• 제7권3호
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• pp.41-46
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• 2008

Generally optical components are fabricated by grinding, lapping and polishing processes. Those processes take long time to obtain optical high surface quality. In the case of large optical components, the on-machine measurement is strongly recommended because the workpiece is fragile and difficult to set up for fabricating and measuring. This paper is concerned about a swing-arm mechanism which can be used for on-machine measurement of a surface profile with a sensing probe end-effect, and also for grinding or lapping the surface with a corresponding tool. The measuring accuracy and uncertainty using a swing arm type profilometer have been studied. The experimental results show that this method is useful specially in lapping process with the accuracy of $5{\mu}m$. Those inspection data are provided for correcting the residual figuring error in next processes.

• 한국정밀공학회지
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• 제26권8호
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• pp.29-34
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• 2009

• 한국생산제조학회지
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• 제19권5호
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• pp.616-621
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• 2010

New type of the base material of the light-emitting diode requires copper wafer in view of heat and electrical conductance. Therefore, polishing process of the substrate level is needed to get a nanometer level of surface roughness as compared with pattern structure of nano-size in the semiconductor industry. In this paper, a series of lapping and polishing technique is shown for the rough and deflected copper substrate of thickness 3mm. Lapping by sand papers tried air cooling method. And two steps of polishing used the diamond abrasives and the $Al_2O_3$ slurry of size 100mm considering the residual scratch. White-light interferometer proved successfully a mirror-like surface roughness of Ra 6nm on the area of $0.56mm{\times}0.42mm$.

• ETRI Journal
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• 제24권5호
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• pp.341-348
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• 2002

We propose an asymmetric sampled grating laser and a multi-wavelength laser array associated with it. Asymmetric sampling periods combined with an index shifter make it possible to use first order reflection for lasing operations. With the structure of our design, we achieved a simple fabrication procedure as well as a high yield without using complex and time-consuming e-beam lithography for multi-period gratings. We analyzed the effect of mirror coating by numerical analysis to improve single mode and power extraction performance. By using high reflection-antireflection coatings, we obtained high power extraction efficiency without degradation of the single mode property. For the multi-wavelength laser array, to gain wavelength control, we varied the sampling periods from one laser to an adjacent laser across the array. With this approach, we showed the feasibility of an array of up to 30 channels with 100 GHz wavelength spacing.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1997년도 춘계학술대회 논문집
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• pp.921-926
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• 1997

SOI(Silicon On lnsulator) technology is many advantages in the gabrication of MOS(Metal-Oxide Semiconductor) and CMOS(Complementary MOS) structures. These include high speed, lower dynamic power consumption,greater packing density, increased radiation tolearence et al. In smiple form of bonded SOL wafer manufacturing, creation of a bonded SOI structure involves oxidizing at least one of the mirror polished silicon surfaces, cleaning the oxidized surface and the surface of the layer to which it will be bonded,bringing the two cleanded surfaces together in close physical proximity, allowing the subsequent room temperature bonding to proceed to completion, and than following this room temperature joining with some form of heat treatment step,and device wafer is thinned to the target thickness. This paper has been performed to investigate the possibility of the bonded SOI wafer manufacturing Especially, we focused on the bonding quality and thinning method. Finally,we achieved the bonded SOI wafer that Si layer thickness is below 3 .mu. m and average roughness is below 5.angs.

• International Journal of Precision Engineering and Manufacturing
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• 제1권2호
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• pp.61-66
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• 2000

In this paper, we discuss the machining characteristics of HDD glass. Glass is now being used globally as a data storage device, Such glasses are usually machined by lapping by this technique requires a long machining time, resulting in low productivity, For this reason, we examine the possibility of EILD grinding in HDD glass workpieces, A move to ELID grinding may result in substantial cost reduction. Our purpose is to investigate the grinding characteristics of HDD glass in ELID grinding. The bonding materials for fixing the abrasives of cast iron, cobalt and bronze are applied, and grinding conditions such as rotation speed and feeding are varied. Results show that with the use of ELID, mirror surfaces can be achieved with high efficiency.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.513-513
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• 2000

An integrable circuit technique for implementing high-speed analog two-input Max/Min circuit is described. The realization method is suitable for fabrication using CMOS technology. The proposed circuit comprises a current mirror and electronic switch connected with a absolute value circuit. The maximum or minimum operation of the proposed circuit can be selected by an external control voltage. The proposed analog Max/Min circuit has a very sharp transfer characteristic and is suitable for real-time systems. Simulation results verified the circuit performances are agreed with the expected values.

• 한국주조공학회지
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• 제29권5호
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• pp.198-203
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• 2009

In order to manufacture copper ultra fine wire used for bonding wire in integrated circuit package, continuous casting process, which can produce high purity copper rod with small cross section, and wiredrawing process have to be optimized to prevent wire brakeage during entire manufacturing process of fine wire. The optimum condition for producing copper rod with mirror surface has to established by investigation of the effects of several parameters such as withdrawal speed, superheat and rod diameter on grain morphology of the cast rod and on its drawing characteristics to fine wire. The purpose of this study is to propose the optimized process parameters in continuous casting process in order to produce cast rod without internal defects, and to predict microstructure orientation suitable for wire drawing process.

• 반도체디스플레이기술학회지
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• 제4권3호
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• pp.17-22
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• 2005

LED lamp was designed by the serial-parallel integration of LED chips in metal-interconnection. The 7 $4.5{\times}4.5\;in^{2}$ masks were designed with the contact type of chrome-no mirror?dark. The white epitaxial thin film was grown by metal-organic chemical vapor deposition. The active layers were consisted with the serial order of multi-quantum wells for blue, green and red lights. The fabricated LED chip showed the electroluminescence peaked at 450, 560 and 600 nm. For the current injection of 20 mA, the operating voltage was measured to 4.25 V and the optical emission power was obtained to 0.7 $\mu$W.