• Title/Summary/Keyword: Microprocessor design

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Microprocessor-Based Digital Controller Design with changing the Damping Ratio (감쇄비 변화를 마이크로프로세서로 이용한 계수형 제어기의 설계)

  • 정태원;김명환
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.19 no.1
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    • pp.35-40
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    • 1982
  • As a general-purpose device, the microprocessor has made a large impact on many area of engineering, In this paper, a controller has been implemented using microprocessors allowing the damping ratio ζ to be changed dynamically in control systems. The results show definite improvement in response time.

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The Design and Implementation of Wireless Audio Transceiver using Bluetooth (블루투스를 이용한 디지털 무선 오디오 송수신기 설계 및 구현)

  • 강명구;조명훈;김대진
    • Proceedings of the IEEK Conference
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    • 2003.11c
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    • pp.259-262
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    • 2003
  • In this paper, we designed and implemented digital wireless audio system with embedded RTOS using Bluetooth. Transmitter is consisted of a Settopbox, FIFO for interface block, Microprocessor(ARM7TDMI), UART driver and Bluetooth module. Receiver is consisted of a Microprocessor, AC-3 decoder, Bluetooth module and a Speaker with Amp. We programed Bluetooth protocal stack of HCI, L2CAP, and RFCOMM, so that Bluetooth module interacts with CPU.

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A Design of 16-bit Adiabatic Low-Power Microprocessor (단열회로를 이용한 16-bit 저전력 마이크로프로세서의 설계)

  • Shin, Young-Joon;Lee, Byung-Hoon;Lee, Chan-Ho;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.6
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    • pp.31-38
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    • 2003
  • A 16-bit adiabatic low-power Microprocessor is designed. The processor consists of control block, multi-port register file, program counter, and ALU. An efficient four-phase clock generator is also designed to provide power clocks for adiabatic processor. Adiabatic circuits based on efficient charge recovery logic(ECRL), are designed 0.35,${\mu}{\textrm}{m}$ CMOS technology. Conventional CMOS processor is also designed to compare the energy consumption of microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is reduced by a factor of 2.9∼3.1 compared to that of conventional CMOS microprocessor.

A 32-bit Microprocessor with enhanced digital signal process functionality (디지털 신호처리 기능을 강화한 32비트 마이크로프로세서)

  • Moon, Sang-ook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.820-822
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    • 2005
  • We have designed a 32-bit microprocessor with fixed point digital signal processing functionality. This processor, combines both general-purpose microprocessor and digital signal processor functionality using the reduced instruction set computer design principles. It has functional units for arithmetic operation, digital signal processing and memory access. They operate in parallel in order to remove stall cycles after DSP or load/store instructions, which usually need one or more issue latency cycles in addition to the first issue cycle. High performance was achieved with these parallel functional units while adopting a sophisticated five-stage pipeline stucture.

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Development of a Capacitance-type wave Recorder for Measuring Real-Time Wave Height Based on Microprocessor Technique (마이크로프로세서 기술에 기초한 실시간 파고 계측용 용량식 파고계의 개발)

  • 김제윤;김환성;김상봉
    • Journal of Ocean Engineering and Technology
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    • v.10 no.3
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    • pp.162-167
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    • 1996
  • This paper deals with an implementation method for the one chip microprocessor(8097)-based capacitance type wave recorder for a measuring real-time wave height. The system was developed to make it possible to real-time remote sensing the wave height by deploying the RS-232/422/485 communication methods. The system test results for the developed system such as linearity, system stability and robustness of the disturbance was also verified through the performance tests of the system. Furthermore, the system was developed after due consideration with connecting the public network such as satellite mobile communication system and LAN, through the deploying VLSI(Very Large Scale Integration) design techniques.

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The Design of a Real-Time Simulator on the Hydraulic Servo System

  • Chang, Sung-Ouk;Lee, Jin-Kul
    • International Journal of Precision Engineering and Manufacturing
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    • v.4 no.1
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    • pp.9-14
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    • 2003
  • In this study we suggest real-time simulator that could describe rent system without ordinary DSP card. This simulator is composed of 80196kc-16bit ordinary microprocessor, which is widely used up to now and personal computer. DSP card that has calculated complex numerical equation is replaced by personal computer and 80196kc generates control signals independently out of the personal computer. In all process personal computer is synchronized with one-board microprocessor (80196kc) within sampling time in the closed loop system. This makes it possible to be described in hydraulic servo system in real time.

Microprocessor Control in D-4 Channel Bank (D-4PCM 단말장치에의 마이크로프로세서 응용)

  • 송상훈;김영균
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.16 no.6
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    • pp.40-47
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    • 1979
  • In the recent developent of D-4 Channel Bank which is the basic PCM multiplex terminal, we utilized the one-chip microprocessor in the design of the Alarm and Trunk processing unit besides we could add more flexible functions, we simplified the logic circuits and the discrete parts. Since in Korea, we are lacking in the semiconductor technology, the microprocessor applications in the communication systems desist give us the meaningful advantages in the a aspects of economy, reliability and new technology.

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A design of floating-point arithmetic unit for superscalar microprocessor (수퍼스칼라 마이크로프로세서용 부동 소수점 연산회로의 설계)

  • 최병윤;손승일;이문기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.5
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    • pp.1345-1359
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    • 1996
  • This paper presents a floating point arithmetic unit (FPAU) for supescalar microprocessor that executes fifteen operations such as addition, subtraction, data format converting, and compare operation using two pipelined arithmetic paths and new rounding and normalization scheme. By using two pipelined arithmetic paths, each aritchmetic operation can be assigned into appropriate arithmetic path which high speed operation is possible. The proposed normalization an rouding scheme enables the FPAU to execute roundig operation in parallel with normalization and to reduce timing delay of post-normalization. And by predicting leading one position of results using input operands, leading one detection(LOD) operation to normalize results in the conventional arithmetic unit can be eliminated. Because the FPAU can execuate fifteen single-precision or double-precision floating-point arithmetic operations through three-stage pipelined datapath and support IEEE standard 754, it has appropriate structure which can be ingegrated into superscalar microprocessor.

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A Study on a Current Controller using TMS320F240 Microprocessor (TMS320F240 마이크로프로세스를 이용한 전류제어기 연구)

  • Bae, Jong-Il
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.9
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    • pp.1380-1384
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    • 2015
  • The DC motor has the strong characteristics in the speed response, the system parameter variations and the external influence and is used as the speed controller with its good starting torque in the distributing industry. However development of the Microprocessor which is for high speed switching program can make better control system. This paper introduce to design of the high-effective DC motor controller that is using Software Bang-Bang Program of Fuzzy algorithm and to verify a PI controller and a Fuzzy controller.

A Study on the 32 bit RISC/DSP Microprocessor Appropriate for Embedded Systems (내장형 시스템에 적합한 32 비트 RISC/DSP 마이크로프로세서에 관한 연구)

  • 유동열;문병인;홍종욱;이태영;이용석
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.257-260
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    • 1999
  • We have designed a 32-bit RISC microprocessor with 16/32-bit fixed-point DSP functionality. This processor, called YRD-5, combines both general-purpose microprocessor and digital signal processor (DSP) functionality using the reduced instruction set computer (RISC) design principles. It has functional units for arithmetic operation, digital signal processing (DSP) and memory access. They operate in parallel in order to remove stall cycles after DSP and load/store instructions with one or more issue latency cycles. High performance was achieved with these parallel functional units while adopting a sophisticated 5-stage pipeline structure and an improved DSP unit.

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