• The Journal of Korea Robotics Society
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• v.7 no.4
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• pp.292-298
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• 2012

It is a real-time system that the system correctness depends not only on the correctness of the logical result of the computation but also on the result delivery time. Real-time Operating System (RTOS) is a software that manages the time of a microprocessor to ensure that the most important code runs first so that it is a good building block to design the real-time system. The real-time performance is achieved by using real-time mechanisms through data communication and synchronization of inter-task communication (ITC) between tasks. Therefore, test on the response time of real-time mechanisms is a good measure to predict the performance of real-time systems. This paper aims to analysis the response characteristics of real-time mechanisms in kernel space for real-time embedded Linux: RTAI and Xenomai. The performance evaluations of real-time mechanism depending on the changes of task periods are conducted. Test metrics are jitter of periodic tasks and response time of real-time mechanisms including semaphore, real-time FIFO, Mailbox and Message queue. The periodicity of tasks is relatively consistent for Xenomai but RTAI reveals smaller jitter as an average result. As for real-time mechanisms, semaphore and message transfer mechanism of Xenomai has a superior response to estimate deterministic real-time task execution. But real-time FIFO in RTAI shows faster response. The results are promising to estimate deterministic real-time task execution in implementing real-time systems using real-time embedded Linux.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.1
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• pp.75-81
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• 2007

This paper dealt with the design and implementation of an expert system to monitor and diagnose the lightning arresters in GIS substations. The expert system consists of a data acquisition module(DAM) based on microprocessor and diagnostic algorithms. The DAM measures and analyzes several parameters necessary for the arrester diagnosis such as system voltages, leakage current components, and temperatures. Also, it includes an intelligent surge counter which can record the date and tin, the polarity, and the amplitude of surge currents. All the data acquired is transmitted to a remote computer by a low rate wireless network specified in IEEE 802.15.4 to avoid electromagnetic intereference under high voltage and large current environments. The decision-making for the arrester diagnosis completes with a Java Expert System Shell(JESS) which is composed of a knowledge base, an inference engine and a graphic user interface(GUI).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.778-781
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• 2007

RSA crypto-processors equipped with more than 1024 bits of key space handle the entire key stream in units of blocks. The RSA processor which will be the target design in this paper defines the length of the basic word as 128 bits, and uses an 256-bits register as the accumulator. For efficient execution of 128-bit multiplication, 32b*32b multiplier was designed and adopted and the results are stored in 8 separate 128-bit registers according to the status flag. In this paper, an efficient method to execute 128-bit MAC (multiplication and accumulation) operation is proposed. The suggested method pre-analyze the all possible cases so that the MAC unit can remove unnecessary calculations to speed up the execution. The proposed architecture protype of the MAC unit was automatically synthesized, and successfully operated at 20MHz, which will be the operation frequency in the target RSA processor.

• Journal of Astronomy and Space Sciences
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• v.18 no.2
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• pp.163-173
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• 2001

In this paper, space radiation environment and single event effect(SEE) have been analyzed for the KOMPSAT-2 operational orbit. As spacecraft external and internal space environment, trapped proton, SEP(solar energetic particle) and GCR(galactic cosmic ray) high energy Protons and heavy ions spectrums are analyzed. Finally, SEU and SEL rate prediction has been performed for the Intel 80386 microprocessor CPU that is planned to be used in the KOMPSAT-2. As the estimation results, under nominal operational condition, it is predicted that trapped proton and high energetic proton induced SBU effect will not occur. But, it is predicted that heavy ion induced SEU can occur several times during KOMPSAT-2 3-year mission operation. KOMPSAT-2 has been implementing system level design to mitigate SEU occurrence using processor CPU error detection function of the on-board flight software.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.109-114
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• 2010

In this paper, the implementation of a human signal sensing module that has capabilities to check and restore the weak signals from the human body is presented. A module presented in this paper consists of processing and sensing elements related to human pulse and body temperature and a controller implemented with SoC design method. PPG data is detected by a noise filtering process toward the amplified signal which is from the operating frequency between 0.1Hz - 10Hz. A digital temperature sensor is used to check the body temperature. A sensor outputs the corresponding value of the electric voltage according to the body temperature. Moreover, this paper discusses the implementation of an enhanced microprocessor which is synthesized with VHDL as a part of the SoC development and used to control the entire module. The SoC processor is implemented on a Xilinx Spartan 3 XC3S1000 device and has the achieved operating frequency of 10MHz. The implemented SoC processor core is successfully tested with macro memories in FPGA and the experimental results are hereby shown.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.6
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• pp.27-33
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• 1984

This paper is an experimental gaudy on the digital hardware implementation of the R2-MF Receiver for 32 channel configurations used in signalling systems between ESS. There are many methods to detect MF signal by DSP techniques, but the requirement for MF detection needs not sharp frequency response, needs only decision about some specific frequencies exist or not at discrete frequency sampling points. The hardware used to implement this algorithm is Am 2900 series "bit-slice microprocessor" chips based on the microprogramming techniques for real time signal processing. And we used the additional Z-80A processor chips for the system control and the decision about which is the right MF signal from the detected MF spectrums. Hence we could enhance the flexibilities of the hardware and the software, this leads that this system is well suits for signalling systems used in TDM ESS.n TDM ESS.

• Journal of the Korean Society for Precision Engineering
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• v.26 no.6
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• pp.68-73
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• 2009

One of the traditional optical methods to monitor a tool is a CCD sensor-based vision system which captures an aspect of the tool in real time. In the case using the CCD sensor, specific lens-modules are necessary to monitor the tool with higher resolution than its pixel size, and a microprocessor is required to attain desired data from captured images. Thus theses additional devices make the entire measurement system complex. Another method is to use a pair of an optical source and a detector per measuring axis. Since the method is based on the intensity modulation, the structure of the measurement system is simper than the CCD sensor-based vision system. However, in the case measuring the three dimensional position of the tool, it is difficult to apply to micro machine-tools because there may not be space to integrate three pairs of an optical source and a detector. In this paper, in order to develop a tool-origin measurement system which is employed in micro machine-tools, the improved method to measure a tool origin in x, y and z axes is introduced. The method is based on the intensity modulation and employs one pair of an optical source radiating divergent beams and a quadrant photodiode to detect a three dimensional position of the tool. This paper presents the measurement models of the proposed tool-origin sensor. The models were verified experimentally The verification results show that the proposed method is possible and the induced models are available for design.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.5
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• pp.29-35
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• 2007

Recently, as the demand of mobile multimedia devices increases and T-DMB is started in Korea, the need of research for integration of mobile devices such as cellular phone, navigation, and portable multimedia player becomes higher. In order to integrate mobile devices, it is necessary to support microprocessor with fast speed and various devices with multimedia service. In this paper, we construct Windows CE 5.0 platform whose BSP supports the embedded system board with ARM11 core and various devices and applications. We also implement the DMB device driver which supports busy waiting and interrupt driven I/O techniques, compare their performance, and then suggest the method to efficiently use the resources of embedded system.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.12-18
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• 2007

As an arc fault interrupter, the AFCI mentioned in this paper has been designed to detect and interrupt arc faults due to wire deterioration, insulation, wire damage, loose connection, and excessive mechanical damage. Since AFCI is digital and uses mechanical and electric stress, the length of interruption against overload and over-current is much shorter than the current bi-metal method. Therefore, the risk of electrical fires has been reduced.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.724-727
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• 2008

Studies on binary adder have been variously developed. According to those studies of critical worst delay and mean delay time of asynchronous binary adders, carry select adders (CSA) based on hybrid structure showed 17% better performance than ripple carry adders (RCA) in 32 bit asynchronous processors, and 23% better than in 64 bit microprocessor implemented. In the complicated signal processing systems such as RSA, it is essential to optimize the performance of binary adders which play fundamental roles. The researches which have been studied so far were subject mostly to addition algorithms or adder structures. In this study, we analyzed and designed adders in an asp;ect of synthesis method. We divided the ways of implementing adders into groups, each of which was synthesized with different synthesis options. Also, we analyzed the variously implemented adders to evaluate the performance and area so that we can propose a different approach of designing optimal binary adders.