• Journal of Electrical Engineering and information Science
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• v.2 no.4
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• pp.1-7
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• 1997

A multiprocessor microprocessor named SMPC(scaleable multiprocessor chip) that contains tow IU (integer unit) is presented in this paper. It can execute multiple instructions from several tasks exploiting task-level parallelism that is free from instruction dependencies, and provide high performance and throughput on both single program and multiprogramming environments. the IU is a 32-bit scalar processor expecially designed to boost up the performance of string manipulations which are frequently used in RDBMS(relational data base management system) applications. A memory management unit and a data cache shared by two IUs improve the performance and reduce the chip area required. ETH SMPC is implemented in VLSI circuit by custom design and automated design tools.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.2023-2026
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• 2002

This paper explains the study of controller design applied to SRM(Switched Reluctance Motor) concept. This controller executes controller algorithms via ${\mu}$-processor to increase stability and precise measurement, and VHDL (Very high speed integrated circuit Hardware Description Language) is designed to generate SRM driving signal. During initial period, SRM controller was designed to control .respective target RPM (Revolution per minutes) and PR (Proportional Integral Differential) coming from the PC(Personal Computer) monitor program, and receiving clockwise and counter-clockwise rotation signal and target RPM coming from the front panel, and receiving the location of rotational element and RPM generating from the position censor during activation period.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.123-126
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• 2003

RSFQ (Rapid Single Flux Quantum) circuits are used in many practical applications. RSFQ DFFC (Delay Flip-Flop with complementary outputs) circuits can be used in a RAM, an ALU (Arithmetic Logic Unit), a microprocessor, and many communication devices. A DFFC circuit has one input, one switch input, and two outputs (output l and output 2). DFFC circuit functions in such way that output 1 follows the input and output 2 is the complement of the input when the switch input is "0." However, when there is a switch input "1."the opposite output signals are generated. In this work, we have designed an RSFQ DFFC circuit based on 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology. As circuit design tools, we used Xic, WRspice, and Lmeter After circuit optimization, we could obtain the bias current margins of the DFFC circuit to be above 32％.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.6
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• pp.589-595
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• 2007

This paper presents a new method on controller design of brushless dc motors. In such drives the current ripples are generated by motor inductance in stator windings and the back EMF. To suppress the current ripples the current controller is generally used. To minimize the size and the cost of the drives it is desirable to control motors without the current controller and the current sensing circuits. To estimate the motor CUlTent it is modeled by a neural network that is contigured as an output-error dynamic system. The identified model is essentially a one step ahead prediction structure in which past inputs and outputs are used to calculate the current output. Using the model, a state feedback controller to compensate the effects of disturbance has been designed. The controller is implemented by a 16-bit microprocessor and the effectiveness of the proposed control method is verified through experiments.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.4
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• pp.24-29
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• 1983

In this paper, a floating-point processor which satisfied the subset of the proposed IEEE standard has been designed and realized by TTL chips. This processor consists of a floating-point arithmetic unit and a control sequencer. AHPL has been used in the design of sequencer. The execution times for the arithmetic operations were measured and compared with other microprocessor. The results had shown faster operations compared to the Z-80 processor. Though this processor was built by TTL chips, it could be fabricated as a one-chip processor.

• Journal of Industrial Technology
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• v.11
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• pp.115-124
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• 1991

In this study, we design a position controller for two axis servo system. The position controller performs numerical control(NC)to DC or AC servo motor or step motor, and also has a digital input/output sequence capability. The control program composed of position and sequence command, which is called channel, is programmed easily and user-interactively. And it is interpreted and the straight line and arc position command is interpolated. We develop the Z80 microprocessor based system and the software with assembly and C language, and also PC based graphic simulator for the debugging and educational purposes.

• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2684-2686
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• 2001

In order to utilize cache in multiprocessor system, cache coherence problem must be handled. Central directory scheme is one of hardware-assisted cache coherence solutions. The goal of this paper was not only to propose some special methods needed to apply central directory scheme to the specific multiprocessor system based on Intel486 microprocessors but also to design central directory unit for cache coherence of the target system. The problems of arbitrating several requests from processors, storing the cache information, and generating control signals for cache line fill and snoop cycle were solved.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.412-418
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• 2004

In this paper, a new distributed intelligent control module based on LonWorks fieldbus for air handling unit(AHU) of heating, ventilating and air-conditioning(HVAC) is proposed to replace with a conventional direct digital control(DDC) with 32 bit microprocessor. This article also addresses an Internet-based HVAC system architecture that combines Web technology and networking. The proposed control architecture has a excellent features such as highly compact and flexible function design, a low priced smart front-end and reliable performance with various functions. This also addresses issues in control network configuration, logical design of field devices by S/W tool, Internet networking and electronic element installation. Experimental results showing the system performance are also included in this paper.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.328-331
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• 2005

In this paper we review the security and privacy problems in the RFID system and briefly describe the research topics to solve these problem. And, we design and implement the tag authentication system to authenticate tags in the RFID system which is composed of PC, reader and passive type tag with low power 8 bit microprocessor.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.372-376
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• 2001

Due to several advantages of Pulse Width Modulation(PWM) Converter, such as unity power factor operation, elimination of low-order harmonics and regeneration of motor braking energy to source, the application range of PWM Converter has been rapidly extended in industrial application. Nowadays, vector control algorithm and space vector PWM(SVPWM) method are applied to improve the performances of PWM Converter, but vector control algorithm and SVPWM require to use Microprocessor and other digital devices in hardware, causing costly and somewhat large dimension system. In every practical application of energy conversion equipments, the design and implementation should be carried out considering cost and performance. High performance and low cost is the best choice for energy conversion equipments. So, this paper presents the practical design method and implementation results of 3-phase PWM Converter with analog hysteresis current controller, and verifies the performances of unit power factor operation and energy regeneration operation via experimental results.