• Title/Summary/Keyword: Metal-insulator-semiconductor

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Fabrication and Properties of Aluminum oxide/6H-SiC Structures using Sputtering Method (스퍼터링법을 이용한 산화알루미늄/6H-SiC 구조의 제작 및 특성)

  • Jung, Soon-Won;Choi, Haeng-Chul;Kim, Jae-Hyun;Jeong, Sang-Hyun;Kim, Kwang-Ho;Koo, Kyung-Wan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.194-195
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    • 2006
  • Aluminum oxide films directly grown on n-type 6H-SiC(0001) substrates were fabricated by RF magnetron sputtering system. Metal-insulator-semiconductor(MIS) C-V properties with aluminum oxide thin films showed hysteresis and f1at band voltage shift. The dielectric constant of the film calculated from the capacitance at the accumulation region was about 5. Typical gate leakage current density of film at room temperature was the order of $10^{-9}\;A/cm^2$ at the range of within 2MV/cm. The breakdown did not occur at the film within the measurement range.

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The evolution of microstructures and electrical properties of $Y_2O_3$ thin films on si(100) upon annealing treatments (열처리에 따른 $Y_2O_3$ 박막의 미세 구조 변화와 전기적 특성 변화에 대한 고찰)

  • 정윤하;강성관;김은하;고대홍;조만호;황정남
    • Journal of the Korean Vacuum Society
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    • v.8 no.3A
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    • pp.218-223
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    • 1999
  • We investigated the interfacial reactions between the $Y_2O_3$ film deposited by ICB processing and p-type (100) Si substrates upon annealing treatments in $O_2$ and Ar gas ambients. we also investigated the evolution of surface morphology of ICB deposited $Y_2O_3$ films upon annealing treatments. We observed that the root-mean-square(RMS) value of surface roughness measured by AFM increased with annealing time at $800^{\circ}C$ in $O_2$ ambient, while the change of surface roughness was not observed in Ar ambient. We also found the growth of $SiO_2$ layer and the formation of yttium silicate layer. From the capacitance values $(C_{acc})$ measured by C-V measurements, the relative didldctric constant of $Y_2O_3$ film in metal-insulator-semiconductor(MIS) structure was estimated to be about 9.

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Metal Oxide Thin Film Transistor with Porous Silver Nanowire Top Gate Electrode for Label-Free Bio-Relevant Molecules Detection

  • Yu, Tae-Hui;Kim, Jeong-Hyeok;Sang, Byeong-In;Choe, Won-Guk;Hwang, Do-Gyeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.268-268
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    • 2016
  • Chemical sensors have attracted much attention due to their various applications such as agriculture product, cosmetic and pharmaceutical components and clinical control. A conventional chemical and biological sensor is consists of fluorescent dye, optical light sources, and photodetector to quantify the extent of concentration. Such complicated system leads to rising cost and slow response time. Until now, the most contemporary thin film transistors (TFTs) are used in the field of flat panel display technology for switching device. Some papers have reported that an interesting alternative to flat panel display technology is chemical sensor technology. Recent advances in chemical detection study for using TFTs, benefits from overwhelming progress made in organic thin film transistors (OTFTs) electronic, have been studied alternative to current optical detection system. However numerous problems still remain especially the long-term stability and lack of reliability. On the other hand, the utilization of metal oxide transistor technology in chemical sensors is substantially promising owing to many advantages such as outstanding electrical performance, flexible device, and transparency. The top-gate structure transistor indicated long-term atmosphere stability and reliability because insulator layer is deposited on the top of semiconductor layer, as an effective mechanical and chemical protection. We report on the fabrication of InGaZnO TFTs with silver nanowire as the top gate electrode for the aim of chemical materials detection by monitoring change of electrical properties. We demonstrated that the improved sensitivity characteristics are related to the employment of a unique combination of nano materials. The silver nanowire top-gate InGaZnO TFTs used in this study features the following advantages: i) high sensitivity, ii) long-term stability in atmosphere and buffer solution iii) no necessary additional electrode and iv) simple fabrication process by spray.

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CHARACTERISTICS OF HETEROEPITAXIALLY GROWN $Y_2$O$_3$ FILMS BY r-ICB FOR VLSI

  • Choi, S.C.;Cho, M.H.;Whangbo, S.W.;Kim, M.S.;Whang, C.N.;Kang, S.B.;Lee, S.I.;Lee, M.Y.
    • Journal of the Korean institute of surface engineering
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    • v.29 no.6
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    • pp.809-815
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    • 1996
  • $Y_2O_3$-based metal-insulator-semiconductor (MIS) structure on p-Si(100) has been studied. Films were prepared by UHV reactive ionized cluster beam deposition (r-ICBD) system. The base pressure of the system was about $1 \times 10^{-9}$ -9/ Torr and the process pressure $2 \times 10^{-5}$ Torr in oxygen ambience. Glancing X-ray diffraction(GXRD) and in-situ reflection high energy electron diffracton(RHEED) analyses were performed to investigate the crystallinity of the films. The results show phase change from amorphous state to crystalline one with increasingqr acceleration voltage and substrate temperature. It is also found that the phase transformation from $Y_2O_3$(111)//Si(100) to $Y_2O_3$(110)//Si(100) in growing directions takes place between $500^{\circ}C$ and $700^{\circ}C$. Especially as acceleration voltage is increased, preferentially oriented crystallinity was increased. Finally under the condition of above substrate temperature $700^{\circ}C$ and acceleration voltage 5kV, the $Y_2O_3$films are found to be grown epitaxially in direction of $Y_2O_3$(1l0)//Si(100) by observation of transmission electron microscope(TEM). Capacitance-voltage and current-voltage measurements were conducted to characterize Al/$Y_2O_3$/Si MIS structure with varying acceleration voltage and substrate temperature. Deposited $Y_2O_3$ films of thickness of nearly 300$\AA$ show that the breakdown field increases to 7~8MV /cm at the same conditon of epitaxial growing. These results also coincide with XPS spectra which indicate better stoichiometric characteristic in the condition of better crystalline one. After oxidation the breakdown field increases to 13MV /cm because the MIS structure contains interface silicon oxide of about 30$\AA$. In this case the dielectric constant of only $Y_2O_3$ layer is found to be $\in$15.6. These results have demonstrated the potential of using yttrium oxide for future VLSI/ULSI gate insulator applications.

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Dielectric Characteristics of Carbon Nitride Films on Quartz Substrate (석영기판에 증착된 질화탄소막의 유전특성)

  • Ha, Se-Geun;Lee, Ji-Gong;Lee, Sung-Pil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.872-875
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    • 2003
  • Carbon nitride($CN_x$) thin films were deposited on quartz substrates using reactive RF magnetron sputtering system at uarious deposition conditions and investigated dielectric characteristics. Samples for capacitance measurements were of the MIM(Metal-Insulator-Metal) type devices. Aluminum film electrodes were prepared by a vacuum thermal evaporation method before and after the deposition of carbon nitride films. Capacitances were measured by a FLUKE PM6306 RCL Meter at room temperature. Current-voltage(I-V) characteristics and resistivity were measured by a CATS CA-EDA semiconductor test and analyzer. The carbon nitride films showed ${\alpha}-C_3N_4$ and ${\beta}-C_3N_4$ etc. peaks through Raman and FTIR. Observed surface of film and side structure using SEM(Scanning Electron Microscope), and measured thickness of film by ${\alpha}-step$. We can find that the dielectric constant was the lowest value in 50% nitrogen ratio and the resistivity was the highest value in 70% nitrogen ratio.

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Epitaxial growth of Pt Thin Film on Basal-Plane Sapphire Using RF Magnetron Sputtering

  • 이종철;김신철;송종환;이충만
    • Proceedings of the Korean Vacuum Society Conference
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    • 1998.02a
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    • pp.41-41
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    • 1998
  • Rare earth metal films have been used as a buffer layer for growing ferroelectric t thin film or a seed layer for magnetic multilayer. But when it was deposited on s semiconductor substrates for the application of magneto-optic (MO) storage media, it i is difficult to exactly measure magnetic cons떠nts due to shunting current, and so it n needs to grow metal films on insulator substrate to reduce such effect. Recently, it w was reported that ultra-thin Pt layer were epitaxially grown on A12O:J by ion beam s sputtering in 비떠 high vacuum and it can be used as a seed layer for the growth of C Co-contained magnetic multilayer. In this stu$\phi$, Pt thin film were epi떠xially grown on AI2D3 ($\alpha$)OJ) by RF magnetron s sputtering. The crystalline structure was analyzed by transmission electron microscope ( (TEM) and Rutherford Back Scattering (RBS)/Ion Channeling. In TEM study, Pt was b believed to be twinned on AI잉3($\alpha$)01) su$\pi$ace about Pt(ll1) plane.Moreover, RBS c channeling spectra showed that minimum scattering yield of Pt(111)/AI2O:J(1$\alpha$)OJ) was 4 4% and Pt(11J)/AI2D3($\alpha$)OJ) had 3-fold symmetry.

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Enhanced fT and fMAX SiGe BiCMOS Process and Wideband Power Efficient Medium Power Amplifier

  • Bae, Hyun-Cheol;Oh, Seung-Hyeub
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.3
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    • pp.232-238
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    • 2008
  • In this paper, a wideband power efficient 2.2 GHz - 4.9 GHz Medium Power Amplifier (MPA), has been designed and fabricated using $0.8{\mu}m$ SiGe BiCMOS process technology. Passive elements such as parallel-branch spiral inductor, metal-insulator-metal (MIM) capacitor and three types of resistors are all integrated in this process. This MPA is a two stage amplifier with all matching components and bias circuits integrated on-chip. A P1dB of 17.7 dBm has been measured with a power gain of 8.7 dB at 3.4 GHz with a total current consumption of 30 mA from a 3 V supply voltage at $25^{\circ}C$. The measured 3 dB bandwidth is 2.7 GHz and the maximum Power Added Efficiency (PAE) is 41 %, which are very good results for a fully integrated Medium PA. The fabricated circuit occupies a die area of $1.7mm{\times}0.8mm$.

Highly stable amorphous indium.gallium.zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure

  • Mativenga, M.;Choi, J.W.;Hur, J.H.;Kim, H.J.;Jang, Jin
    • Journal of Information Display
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    • v.12 no.1
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    • pp.47-50
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    • 2011
  • Highly stable amorphous indium.gallium.zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etchstopper and via-hole structure. The TFTs exhibited 40 $cm^2$/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (${\Delta}V_{th}$) at room temperature. The excellent stability is attribute to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at $60^{\circ}C$ showed that there was a smaller ${\Delta}V_{th}$ in the AC stress compared with the DC stress for the same effective stress time, indicating that the trappin of the carriers at the active layer-gate insulator interface was the dominant degradation mechanism.

Characteristics of the Crystal Structure and Electrical Properties of Metal/Ferroelectric/Insulator/Semiconductor (Metal/Ferroelectric/Insulator/Semiconductor 구조의 결정 구조 및 전기적 특성에 관한 연구)

  • 신동석;최훈상;최인훈;이호녕;김용태
    • Journal of the Korean Vacuum Society
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    • v.7 no.3
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    • pp.195-200
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    • 1998
  • We have investigated the crystal structure and electrical properties of Pt/SBT/$CeO_2$/Si(MFIS) and Pt/SBT/Si(MFS) structures for the gate oxide of ferroelectric memory. XRD spectra and SEM showed that the SBT film of SBT/$CeO_2$/Si structure had larger grain than that of SBT/Si structure. Furthermore HRTEM showed that SBT/$CeO_2$/Si had 5 nm thick $SiO_2$layer and very smooth interface but SBT/Si had 6nm thick $SiO_2$layer and 7nm thick amorphous intermediate interface. Therefore, $CeO_2$film between SBT film and Si substrate is confirmed as a good candidate for a diffusion barrier. The remanent polarization decreased and coercive voltage increased in Pt/SBT/$CeO_2/Pt/SiO_2$/Si structure. This effect may increase memory window of MFIS structure directly related to the coercive voltage. From the capacitance-voltage characteristics, the memory of Pt/SBT(140 nm)/$CeO_2$(25 nm)/Si structure were in the range of 1~2 V at the applied voltage of 4~6 V. The memory window increased with the thickness of SBT film. These results may be due to voltage applied at SBT films. The leakage currents of Pt/SBT/$CeO_2$/Si and Pt/SBT/Si were $ 10^8A/\textrm{cm}^2$ and $ 10^6 A/\textrm{cm}^2$, respectively.

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The Effect of the Heat Treatment of the ZrO2 Buffer Layer and SBT Thin Film on Interfacial Conditions and Ferroelectric Properties of the SrBi2Ta2O9/ZrO2/Si Structure (ZrO2 완충층과 SBT 박막의 열처리 과정이 SrBi2Ta2O9/ZrO2/Si 구조의 계면 상태 및 강유전 특성에 미치는 영향)

  • Oh, Young-Hun;Park, Chul-Ho;Son, Young-Guk
    • Journal of the Korean Ceramic Society
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    • v.42 no.9 s.280
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    • pp.624-630
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    • 2005
  • To investigate the possibility of the $ZrO_2$ buffer layer as the insulator for the Metal-Ferroelectric-Insulator-semiconductor (MFIS) structure, $ZrO_2$ and $SrBi_2Ta_2O_9$ (SBT) thin films were deposited on the P-type Si(111) wafer by the R.F. magnetron-sputtering method. According to the process with and without the post-annealing of the $ZrO_2$ buffer layer and SBT thin film, the diffusion amount of Sr, Bi, Ta elements show slight difference through the Glow Discharge Spectrometer (GDS) analysis. From X-ray Photoelectron Spectroscopy (XPS) results, we could confirm that the post-annealing process affects the chemical binding condition of the interface between the $ZrO_2$ thin film and the Si substrate. Compared to the MFIS structure without the post-annealing of the $ZrO_2$ buffer layer, memory window value of MFlS structure with post-annealing of the $ZrO_2$ buffer layer were considerably improved. The window memory of the Pt/SBT (260 nm, $800^{\circ}C)/ZrO_2$ (20 nm) structure increases from 0.75 to 2.2 V under the applied voltage of 9 V after post-annealing.