• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.533-533
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• 2007

The stress effect of SiGe p-type metal oxide semiconductors field effect transistors(MOSFETs) has been investigated to compare device properties using Si bulk and partially depleted silicon on insulator(PD SOI). The electrical properties in SiGe PD SOI presented enhancements in subthreshold slope and drain induced barrier lowering in comparison to SiGe bulk. The reliability of gate oxides on bulk Si and PD SOI has been evaluated using constant voltage stressing to investigate their breakdown (~ 8.5 V) characteristics. Gate leakage was monitored as a function of voltage stressing time to understand the breakdown phenomena for both structures. Stress induced leakage currents are obtained from I-V measurements at specified stress intervals. The 1/f noise was observed to follow the typical $1/f^{\gamma}$ (${\gamma}\;=\;1$) in SiGe bulk devices, but the abnormal behavior ${\gamma}\;=\;2$ in SiGe PD SOI. The difference of noise frequency exponent is mainly attributed to traps at silicon oxide interfaces. We will discuss stress induced instability in conjunction with the 1/f noise characteristics in detail.

• Korean Journal of Materials Research
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• v.10 no.12
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• pp.807-811
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• 2000

CeO$_2$ and SrBi$_2$Ta$_2$O$_{9}$ (SBT) thin films for MFISFET (Metal-ferroelectric-insulator-semiconductor-field effect transistor) were deposited by r.f. sputtering and pulsed laser ablation method, respectively. The effects of sputtering gas ratio(Ar:O$_2$) during deposition for CeO$_2$ films were investigated. The CeO$_2$ thin films deposited on Si(100) substrate at $600^{\circ}C$ exhibited (200) preferred orientation. The preferred orientation, Brain size and surface roughness of films decreased with increasing oxygen to argon gas ratio. The films deposited under the condition of Ar:O$_2$= 1 : 1 showed the best C- V characteristics. The leakage current of films showed the order of 10$^{-7}$ ~10$^{-8}$ A at 100kV/cm. The SBT thin films on CeO$_2$/Si substrate showed dense microstructure of polycrystalline phase. From the C-V characteristics of MFIS structure with SBT film annealed at 80$0^{\circ}C$, the memory window width was 0.9V at 5V The leakage current density of Pt/SBT/CeO$_2$/Si structure annealed at 80$0^{\circ}C$ was 4$\times$10$^{-7}$ /$\textrm{cm}^2$ at 5V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.326-329
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• 2002

In this paper, we investigated a feasibility of cerium oxide(CeO$_2$) films as a buffer layer of MFIS(metal ferroelectric insulator semiconductor) type capacitor. CeO$_2$ layer were Prepared by two step process of a low temperature film growth and subsequent RTA (rapid thermal annealing) treatment. By app1ying an ultra thin Ce metal seed layer and N$_2$ Plasma treatment, dielectric and interface properties were improved. It means that unwanted SiO$_2$ layer generation was successfully suppressed at the interface between He buffer layer and Si substrate. The lowest lattice mismatch of CeO$_2$ film was as low as 1.76% and average surface roughness was less than 0.7 m. The Al/CeO$_2$/Si structure shows breakdown electric field of 1.2 MV/cm, dielectric constant of more than 15.1 and interface state densities as low as 1.84${\times}$10$\^$11/ cm$\^$-1/eV$\^$-1/. After N$_2$ plasma treatment, the leakage current was reduced with about 2-order.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.149-149
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• 2008

Metal-Insulator-Metal(MIM) capacitors have been studied extensively for next generation of high-density dynamic random access memory (DRAM) devices. Of several candidates for metal electrodes, Ru or its conducting oxide $RuO_2$ is the most promising material due to process maturity, feasibility, and reliability. ALD can be used to form the Ru and RuO2 electrode because of its inherent ability to achieve high level of conformality and step coverage. Moreover, it enables precise control of film thickness at atomic dimensions as a result of self-limited surface reactions. Recently, ALD processes for Ru and $RuO_2$, including plasma-enhanced ALD, have been studied for various semiconductor applications, such as gate metal electrodes, Cu interconnections, and capacitor electrodes. We investigated Ru/$RuO_2$ thin films by thermal ALD with various deposition parameters such as deposition temperature, oxygen flow rate, and source pulse time. Ru and $RuO_2$ thin films were grown by ALD(Lucida D150, NCD Co.) using RuDi as precursor and O2 gas as a reactant at $200\sim350^{\circ}C$.

• Korean Journal of Metals and Materials
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• v.50 no.8
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• pp.613-618
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• 2012

We report on electrical and mechanical properties of silicon nitride ($SiN_x$) films deposited by a plasma enhanced chemical vapor deposition (PECVD) method at $200^{\circ}C$ from $SiH_4$ highly diluted in $N_2$. The films were also prepared from $SiH_4$ diluted in He for comparison. The $N_2$ dilution was also effective in improving adhesion of the $SiN_x$ films, fascilitating construction of thin film transistors (TFTs). Metal-insulator-semiconductor (MIS) and Metal-insulator-Metal (MIM) structures were used for capacitance-voltage (C-V) and current-voltage (I-V) measurements, respectively. The resistivity and breakdown field strength of the $SiN_x$ films from $N_2$-diluted $SiH_4$ were estimated to be $1{\times}10^{13}{\Omega}{\cdot}cm$, 7.4 MV/cm, respectively. The MIS device showed a hysteresis window and a flat band voltage shift of 3 V and 0.5 V, respectively. The TFTs fabricated by using these films showed a field-effect mobility of $0.16cm^2/Vs$, a threshold voltage of 3 V, a subthreshold slope of 1.2 V/dec, and an on/off ratio of > $10^6$.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.280-280
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• 2010

Semiconductor quantum dots are of great interest for both fundamental research and industrial applications due to their unique size dependant properties. The most promising application of colloidal semiconductor nanocrystals (quantum dots or QDs) is probably as emitters in biomedical labeling, LEDs, lasers etc. As compared to II-VI quantum dots, III-V have attracted greater interest owing to their less ionic lattice, larger exciton diameters and reduced toxicity. Among the III-V semiconductor quantum dots, Indium Phosphide (InP) is a popular material due to its bulk band gap of 1.35 (eV) which is responsible for the photoluminescence emission wavelength ranging from blue to near infrared with change in size of QDs. Nevertheless, in recent years, the exact type of collective properties that arise when semiconductor quantum dots (QDs) are assembled into two- or three-dimensional arrays has drawn much interest. The term "uantum dot solids" is used to indicate three-dimensional assemblies of semiconductor QDs. The optoelectronic properties of the quantum dot solids are known to depend on the electronic structure of the individual quantum dot building blocks and on their electronic interactions. This paper reports an efficient and rapid method to produce highly luminescent and monodisperse quantum dots solution and solid through fabrication of InP thin films. By varying the molar concentration of Indium to Ligand, QDs of different size were prepared. The absorption and emission behaviors were also studied. Similar measurements were also performed on InP quantum dot solid by fabricating InP thin films. The optical properties of the thin films are measured at different curing temperatures which show a blue shift with increase in temperature. The dielectric properties of the thin films were also investigated by Capacitance-voltage(C-V) measurements in a metal-insulator-semiconductor (MIS) device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.115-116
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• 2008

The ferroelectric vinylidene fluoride-trifluoroethylene ($VF_2$-TrFE) and $Al_2O_3$ passivation layer for the Metal/Insulator/Ferroelectric/Semiconductor (MIFS) structure were deposited using spin coating and remote plasma atomic layer deposition (RPALD), respectively. A 2.5 ~ 3 wt % diluted solution of purified vinylidene fluoride-trifluoroethylene ($VF_2$: TrFE=70:30) in a DMF solution were prepared and deposited on silicon wafer at a optimized spin speed. After annealing in a vacuum ambient at 150 ~ $200^{\circ}C$ for 60 min, upper insulator layer were deposited at temperature ranging from 100 ~ $150^{\circ}C$ by RPALD. We described electrical and structural properties of MIFS fabricated by spin coating and RPALD methods.

• ETRI Journal
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• v.35 no.4
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• pp.571-577
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• 2013

The fabrication of a thin-film transistor backplane and a liquid-crystal display using printing processes can eliminate the need for photolithography and offers the potential to reduce the manufacturing costs. In this study, we prepare contact via structures through a poly(methyl methacrylate) polymer insulator layer using inkjet printing. When droplets of silver ink composed of a polymer solvent are placed onto the polymer insulator and annealed at high temperatures, the silver ink penetrates the interior of the polymer and generates conducting paths between the top and bottom metal lines through the partial dissolution and swelling of the polymer. The electrical property of various contact via-hole interconnections is investigated using a semiconductor characterization system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.115-117
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• 2022

The electrical characteristics of the monolithic 3-dimensional static random access memory consisting of a feedback field-effect transistor (M3D-SRAM-FBFET) was investigated using technology computer-aided design (TCAD). The N-type FBFET and N-type MOSFET are designed with fully depleted silicon on insulator (FDSOI), and those are located at bottom and top tiers, respectively. For the M3D-SRAM-FBFET, as the supply voltage decreased from 1.9 V to 1.6 V, the reading on-current decreased approximately 10 times.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.5
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• pp.536-541
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• 2003

In order to avoid oxygen contamination on the diamond surface as far as possible during the device process, the A1/Ca $F_2$/diamond MISFET(metal-insulator-semiconductor field-effect transistor) was prepared by ultrahigh vacuum process and its electrical properties were investigated. The surface conductive layer of fluorinated diamond surface was employed for the conducting channel of the MISFET. The observed effective mobility(${\mu}$e$\_$ff/) of the MISFET was 300 c $m^2$/Vs, which is the highest value obtained until now in the diamond FET. Besides, the measured surface state density of the device was ∼10$\^$11//c $m^2$ eV, which is comparable with conventional Si MOSFET$\_$s/(metal-oxide-semiconductor field-effect-transistors). This work is the first report of the fluorinated diamond MISFET prepared by ultrahigh vacuum process and its application to inverter circuit.