• Journal of KIISE:Computer Systems and Theory
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• v.35 no.1
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• pp.53-59
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• 2008

In spite of increasing complexity of wireless sensor network applications, most of the sensor node platforms still have severe resource constraints. Especially a small amount of memory and absence of a memory management unit (MMU) cause many problems in managing application thread stacks. Hence, a shared-stack was proposed, which allows several threads to share one single stack for minimizing the amount of memory wasted by fixed-size stacks. In this paper, we present the memory usage models for thread stacks by deriving the overflow probability of the fixed-size stack and the shared-stack and also show that the shared-stack is more reliable than the fixed-size stack.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.7
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• pp.708-712
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• 2008

Existing dynamic memory allocation schemes for general purpose operating system can not directly apply to the wireless sensor networks (WSNs). Because these schemes did not consider features of WSNs, they consume a lot of energy and waste the memory space caused by fragmentation. In this paper, we found features of WSNs applications and made the model which adapts these issues. Through this research, we suggest the slab allocator that reduces the execution time and the memory management space. Also, we evaluate the performance of our scheme by comparing to one of the previous systems.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.3
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• pp.149-155
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• 2007

In this paper, we propose an real-time implementation of JPEG2000 codec on the ARM9 processor. The implemented codec is designed to separate control codes from data management codes in order to use effectively the system resources such as processor and memory. Especially, in embedded situations like cellular phones it is very important to provide good services using limited processor and internal memory. Since ARM9 series processors do not provide floating-point, large amount of computational time is required to perform the operation which needs highly repetitive floating-point computations like DWT(discrete wavelet transform). The proposed codec was programed using fixed-point to overcome this weakness. Also code optimization considering cache memory was applied to further improve the computational speed.

• Journal of the Korea Safety Management & Science
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• v.19 no.2
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• pp.147-157
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• 2017

The tourism experience factor is an essential source of competitive advantage in the tourism industry and is an important factor for predicting future tourism behavior. Tourism experience elements can be composed of areas of education, entertainment, aesthetics and deviance (Pine and Gilmore, 1998). This study examines the effect of tourist experience factors on tourist loyalty and it is meaningful to see if the experiential economic theory of Pine and Gilmore (1999) is applicable. In order to achieve the purpose of this study, we conducted a questionnaire survey on tourists using experiential tourism factors. As a result, it was found that recreational experiential factors had a significant effect on memory. Memory has a significant effect on both visitor satisfaction and tourist loyalty. This study has academic significance because it focuses on the tourism experience factor which is the core of experiential economic theory. Practical significance is that a lot of experiential contents should be found in order to better match the tourist experience factor to the requirements of visitors to the tourist site. As a result, it is expected to generate revenue and improve its competitiveness.

• Journal of Korea Multimedia Society
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• v.11 no.5
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• pp.651-660
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• 2008

Flash memory is widely used in embedded systems because of its benefits such as non-volatile, shock resistant, and low power consumption. However, NAND flash memory suffers from out-place-update, limited erase cycles, and page based read/write operations. To solve these problems, YAFFS and RFFS, the flash memory file systems, are proposed. However YAFFS takes long time to mount the file system, because all the files are scattered all around flash memory. Thus YAFFS needs to fully scan the flash memory. To provide fast mounting, RFFS has been proposed. It stores all the block information, the addresses of block information and meta data to use them at mounting time. However additional operations for the meta data management are decreasing the performance of the system. This paper presents a new NAND flash file system called ERFFS (Efficient and Reliable Flash File System) which provides fast mounting and recovery with minimum mata data management. Based on the experimental results, ERFFS reduces the flash mount/recovery time and the file system overhead.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.411-421
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• 2002

In this paper, we present a new survivor path memory management method and a dedicated hardware architecture for the design of high-speed Viterbi decoders in modern digital communication systems. In the proposed method, a novel use of k-starting node number deciding circuits enables to acheive the immediate traceback of the merged survivor path from which we can decode output bits, and results in smaller survivor path memory size and processing delay time than the previously known methods. Also, in the proposed method, the survivor path memory can be constructed with ease using a simple standard dual-ported memory since one read-pointer and one write-pointer, that are updated at the same rate, are required for managing the survivor path: the previously known algorithms require either complex k-ported memory structure or k-times faster read capability than write. With a moderate hardware cost for immediate traceback capability the proposed method is superior to the previously known methods for high-speed Viterbi decoding.

• Aerospace Engineering and Technology
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• v.11 no.2
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• pp.73-79
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• 2012

Because the contact time between satellite and ground station is very limited in LEO (Low Earth Orbit) satellite, all telemetry data generated on spacecraft bus are stored in a mass memory and downlinked to the ground together with real time data during the contact time. The mass memory is initialized in the first system initialization phase and the page status of each memory block is generated step by step. After the completion of the system initialization, the telemetry data are continuously stored and the stored data are played back to the ground by command. And the memory scrubbing is periodically performed for correction of single bit error which can be generated on harsh space environment. This paper introduces the mass memory operation method for telemetry processing of LEO satellite. It includes a general mass memory data structure, the methods of mass memory initialization, scrubbing, data storage and downlink, and mass memory management of primary and redundant mass memory.

• Journal of Information Technology Applications and Management
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• v.31 no.1
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• pp.177-188
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• 2024

In this research, a cohort of two children, aged 7-8 years, was selected to participate in a specialized three-week training program aimed at enhancing their working memory. The program consisted of three sessions, each lasting approximately 30 minutes. The primary goal was to investigate the impact and developmental trajectory of working memory in school-aged children. Working memory plays a significant role in young children's learning and daily activities. To address the needs of this demographic, products should offer both educational and enjoyable activities that engage working memory. Digital educational tools, known for their flexibility, are suitable for both older individuals and young children. By updating software or modifying content, these tools can be effectively repurposed for young learners without extensive hardware changes, making them both cost-effective and practical. For example, memory training games initially designed for older adults can be adapted for young children by altering images, music, or storylines. Furthermore, incorporating elements familiar to children, like animals, toys, or fairy tales, can increase their engagement in these activities. Historically, working memory capabilities have been assessed predominantly through traditional intelligence tests. However, recent research questions the adequacy of these behavioral measures in accurately detecting changes in working memory. To bridge this gap, the current study utilized electroencephalography (EEG) as a more sophisticated and precise tool for monitoring potential changes in working memory after the training. The research findings were revealing. Participants showed marked improvement in their performance on n-back tasks, a standard measure for evaluating working memory. This improvement post-training strongly supports the effectiveness of the training program. The results indicate that such targeted and structured training programs can significantly enhance the working memory abilities of children in this age group, providing promising implications for educational strategies and cognitive development interventions.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.4
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• pp.29-33
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• 2024

Recent advancements in mobile apps have led to continuously increasing memory demands on smartphone systems. Unlike desktops, which use swap functions to backup the entire memory footprint to storage when memory space is exhausted, smartphones terminate apps and lose significant context. This occurs because large-scale I/O operations to flash memory cause severe delays when swap is enabled on smartphones. This paper discusses how efficient memory management can be performed by using eMRAM, which is faster in write operations than flash memory, as the swap area in mobile systems. Considering the characteristics of backup storage (i.e., flash memory for the file system and eMRAM for the swap areas) as well as the reference characteristics of each page, we demonstrate that the proposed memory allocation and reclamation policies can improve the smartphone's I/O performance by an average of 15%.

• Journal of Digital Contents Society
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• v.14 no.2
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• pp.215-222
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• 2013

NAND flash memory-based Solid State Drives (SSD) have lots of merits compared to traditional hard disk drives (HDD). However, random write in SSD is still far slower than sequential read/write and random read. There are two independent approaches to resolve this problem: 1) using part of the flash memory blocks as log blocks, and 2) using internal write buffer (DRAM or Non-Volatile RAM) in SSD. While log blocks are managed by the Flash Translation Layer (FTL), write buffer management has been treated separately from FTL. Write buffer management schemes did not use the exact status of log blocks and log block management schemes in FTL did not consider the behavior of write buffer management scheme. In this paper, we first show that log blocks and write buffer have a tight relationship to each other, which necessitates integrated management of both of them. Since log blocks also can be viewed as another type of write buffer, we can manage both of them as an integrated write buffer. Then we provide three design criteria for the integrated write buffer management scheme which can be very useful to SSD firmware designers.