• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2017년도 추계학술대회
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• pp.477-479
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• 2017

최근 발달된 의료 기술과 건강의 관심이 높아지면서 병의 예방과 치료가 발달하고, 이에 따라 고령화가 빠르게 진행되고 있다. 이러한 수명 연장과 고령화 속에서 진단 중심 의료 수요가 급증하고 있다. 본 논문에서는 센서를 통해 제어가 가능한 FPGA 기반 웨어러블 환자 체크 시스템을 제안한다. 기존 병원에서는 의사나 간호사가 일정 시간마다 일일이 환자를 방문하여 상태를 체크하였다. 하지만 본 논문에서는 환자 체크 시스템을 사용하여 환자 및 의사, 간호사가 원하는 시간대에 환자의 상태를 확인할 수 있다. 또한, 몸이 불편한 환자를 위해 기울기 센서를 이용하여 쉽게 제어가 가능하도록 구현하였다. 제안하는 FPGA 기반 하드웨어 구조는 확대 영상처리를 위한 알고리즘, 환자의 상태 영상출력을 위한 TFT-LCD Controller, CIS Controller 및 Memory Controller로 구성된다. Cyclone IV EP4CE115F29C7 FPGA 디바이스가 장착된 DE2-115 테스트 보드를 사용하여 구현 및 검증하였으며, 동작 주파수는 50MHz이다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1826-1829
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• 2005

Recent advancement in wireless communications and electronics has enabled the development of low power sensor network. Wireless sensor network are often used in remote monitoring control applications, health care, security and environmental monitoring. Wireless sensor networks are an emerging technology consisting of small, low-power, and low-cost devices that integrate limited computation, sensing, and radio communication capabilities. Sensor network platform for health care has been designed, fabricated and tested. This system consists of an embedded micro-controller, Radio Frequency (RF) transceiver, power management, I/O expansion, and serial communication (RS-232). The hardware platform uses Atmel ATmega128L 8-bit ultra low power RISC processor with 128KB flash memory as the program memory and 4KB SRAM as the data memory. The radio transceiver (Chipcon CC1000) operates in the ISM band at 433MHz or 916MHz with a maximum data rate of 76.8kbps. Also, the indoor radio range is approximately 20-30m. When many sensors have to communicate with the controller, standard communication interfaces such as Serial Peripheral Interface (SPI) or Integrated Circuit ($I^{2}C$) allow sharing a single communication bus. With its low power, the smallest and low cost design, the wireless sensor network system and wireless sensing electronics to collect health-related information of human vitality and main physiological parameters (ECG, Temperature, Perspiration, Blood Pressure and some more vitality parameters, etc.)

• Composites Research
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• 제17권4호
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• pp.18-24
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• 2004

본 논문에서는 복합재 구조물에 대하여 형상기억합금 선을 이용한 능동 형상 제어에 관한 연구를 수행하였다. 형상기억합금 선의 열-기계적인 특성을 실험적으로 측정하였으며, 복합재 보 시편의 표면에 볼트를 이용하여 형상기억합금 작동기를 고정하는 방법으로 하이브리드 복합재 구조물을 제작하였다 형상기억합금 작동기는 온도 상승에 의한 상변화에 의해 작동되며, 본 연구에서는 형상기억합금 작동기에 전력을 가하여 내부 저항을 통해 발생하는 열을 이용하여 구동하였다. 보다 빠르고 정확한 형상 및 변형 제어를 위하여 수치적 시뮬레이션을 통한 PID 되먹임 제어기를 설계하였으며, 형상기억합금 작동기에 적용하는 실험을 수행하였다.

• Smart Structures and Systems
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• 제18권4호
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• pp.663-682
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• 2016

Continuum manipulators as a kind of mechanical arms are useful tools in special robotic applications. In medical applications, like colonoscopy, a maneuverable thin and flexible manipulator is required. This research is focused on developing a basic module for such an application using shape memory alloys (SMA). In the structure of the module three wires of SMA are uniformly distributed and attached to the circumference of a flexible tube. By activating wires, individually or together, different rotation regimes are provided. SMA model is used based on Brinson work. The SMA model is combined to model of flexible tube to provide a composite model of the module. Simulating the model in Matlab provided a platform to be used to develop controller. Complex and nonlinear behavior of SMA make the control problem hard especially when a few SMA actuators are active simultaneously. In this paper, position control of the two degree of freedom module is under focus. An experimental control strategy is developed to regulate a desired position in the module. The simulation results present a reasonable performance of the controller. Moreover, the results are verified through experiments and show that the continuum module of this paper would be used in real modular manipulators.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권4호
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• pp.229-236
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• 2005

This paper presents a system level architecture evaluation technique that leverages transaction level modeling but also significantly extends it to the realm of system level performance evaluation. A major issue lies with the modeling effort. To reduce the modeling effort the proposed technique develops the concept of worst case scenarios. Since the memory controller is often found to be an important component that critically affects the system performance and thus needs optimization, the paper further addresses how to evaluate and optimize the memory controllers, focusing on the test environment and the methodology. The paper also presents an industrial case study using a real state-of-the-art design. In the case study, it is reported that the proposed technique has helped successfully find the performance bottleneck and provide appropriate feedback on time.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
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• pp.1125-1128
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• 1987

This paper proposes a method which distributes the structure data represented by a tree and handles it. To distribute and handle the structure data, this method partitions a structure data and distributes the partitioned structure in multiple processing element and allocates the partitioned structure. Each processing element includes the structure memory to store the partitioned structure and the structure controller to handle efficiently the distributed structure. As the structure is distributed and is stored in the structure memory and is handled by the structure controller, the processing time is reduced.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.527-528
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• 2008

In this paper, several cases of multi-shared bus architecture are discussed and in order to decrease the bridge latency, the architecture introducing a memory decoder is proposed. Finally, a LCD controller using DMA master is integrated in this bus architecture that is verified due to RTL simulation and FPGA board test. DMA, LCD line buffer and SDRAM controller are normally operated in the timing simulation using ModelSim tool, and the LCD image is confirmed in the real FPGA board containing LCD panel.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 추계종합학술대회
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• pp.409-412
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• 2002

본 논문에서는 PC 유저 인터페이스에 관한 것으로 T33521을 기반으로 한 MMC, SSFCD 카드의 인터페이스를 구현하였다. 이는 12Mbit/s의 USB를 활용하고 있으며 윈도우 98등에서 동작 가능하다. 또한 8/16M 그리고 32M SMC 플래쉬 메모리에 대한 읽기/쓰기 모드 및 다양한 유틸리티 프로그램을 구현하였다.

• 한국통신학회논문지
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• 제12권5호
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• pp.492-504
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• 1987

Binary Decision방법은 출력을 얻는데 요구되는 결정스텝이 최대 입력변수의 수를 넘지 않도록 한다. BD-PC모듈은 스캔 스피드를 개선하기 위해 이 방법을 이용하여 설계제작되었다. Binary Decision방식에 수반되는 메모리문제를 개선하기 위해 컴파일러 시스템을 개발하였다. 또한, 컴파일된 BD-PC목적프로그램을 BD머신의 메모리에 로디하기 위해 MDS와 BD-PC모듈간에 통신채널을 구성하였다.

• 전기학회논문지
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• 제57권8호
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• pp.1440-1446
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• 2008

In this paper, a novel TMR (Triple Modular Redundancy) memory structure is proposed using state feedback control of asynchronous sequential machines. The main ability of the proposed structure is to correct the fault of SEU (Single Event Upset) asynchronously without resorting to the global synchronous clock. A state-feedback controller is combined with the TMR realized as a closed-loop asynchronous machine and corrective behavior is operated whenever an unauthorized state transition is observed so as to recover the failed state of the asynchronous machine to the original one. As a case study, an asynchronous machine modelling of TMR and the detailed procedure of controller construction are presented. A simulation results using VHDL shows the validity of the proposed scheme.