• Journal of Yeungnam Medical Science
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• v.16 no.1
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• pp.25-33
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• 1999

Benzodiazepines(BZDs) are among the most widely prescribed drugs in the world. They are potent anxiolytic, antiepileptic, hypnotic, and muscle relaxing agents. There is an emerging model of the role of several neural systems in anxiety and their relation to the mechanism of action of BZDs. It has been postulated that BZD drugs exert their anxiolytic action by regulating GABAergic transmission in limbic areas such as the amygdala, in the posterior hypothalamus, and in the raphe nuclei. The involvement of the amygdala in the behaviors triggered by fear and stress has been suggested by many previous studies. In this review, reports about regulatory effects of endogenous BZD receptor ligands on the perception of anxiety and memory consolidation were summerized. These findings further support the contention that BZD receptor ligands modulate memory consolidation of averse learning tasks by influencing the level of stress and/or anxiety that accompanies a learning experience. The findings suggest that the decrease in the limbic levels of BZD-like molecules seen after the various behavioral procedures represent a general response to stress and/or anxiety, since it occurs in proportion to the level of stress and/or anxiety that accompany these tasks. In addition, these findings further support the hypothesis that the $GABA_A$/BZD receptor complex in limbic structures plays a pivotal role in the stress and anxiety.

• KIPS Transactions on Computer and Communication Systems
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• v.6 no.5
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• pp.219-230
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• 2017

General-Purpose Graphics Processing Units (GPGPUs) build massively parallel architecture and apply multithreading technology to explore parallelism. By using programming models like CUDA, and OpenCL, GPGPUs are becoming the best in exploiting plentiful thread-level parallelism caused by parallel applications. Unfortunately, modern GPGPU cannot efficiently utilize its available hardware resources for numerous general-purpose applications. One of the primary reasons is the inefficiency of existing warp/thread block schedulers in hiding long latency instructions, resulting in lost opportunity to improve the performance. This paper studies the effects of hardware thread scheduling policy on GPGPU performance. We propose a novel warp scheduling policy that can alleviate the drawbacks of the traditional round-robin policy. The proposed warp scheduler first classifies the warps of a thread block into two groups, warps with long latency and warps with short latency and then schedules the warps with long latency before the warps with short latency. Furthermore, to support the proposed warp scheduler, we also propose a supplemental technique that can dynamically reduce the number of streaming multiprocessors to which will be assigned thread blocks when encountering a high contention degree at the memory and interconnection network. Based on our experiments on a 15-streaming multiprocessor GPGPU platform, the proposed warp scheduling policy provides an average IPC improvement of 7.5% over the baseline round-robin warp scheduling policy. This paper also shows that the GPGPU performance can be improved by approximately 8.9% on average when the two proposed techniques are combined.