• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.10
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• pp.81-92
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• 1995

In this paper, we present a high-level synthesis system that generates area-efficient RT-level datapaths with multiport memories. The proposed scheduling algorithm assigns an operation to a specific control step such that maximal sharing of functional units can be achieved with minimal number of memory ports, while satisfying given constraints. We propose a measure of multiport memory cost, MAV (Multiple Access Variable) which is defined as a variable accessed at several control steps , and overall memory cost is reduced by equally distributing the MAVs throughout all the control steps. Experimental results show the effectiveness of the proposed algorithm. When compared with previous approaches for several benchmarks available from literature, the proposed algorithm generates the datapaths with less memory modules and interconnection structures by reflecting the memory cost in the scheduling process.

• Structural Engineering and Mechanics
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• v.27 no.5
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• pp.575-588
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• 2007

In this paper, two algorithms are presented for the optimum design of geometrically nonlinear steel space frames using tabu search. The first algorithm utilizes the features of short-term memory (tabu list) facility and aspiration criteria and the other has long-term memory (back-tracking) facility in addition to the aforementioned features. The design algorithms obtain minimum weight frames by selecting suitable sections from a standard set of steel sections such as American Institute of Steel Construction (AISC) wide-flange (W) shapes. Stress constraints of AISC Allowable stress design (ASD) specification, maximum drift (lateral displacement) and interstorey drift constraints were imposed on the frames. The algorithms were applied to the optimum design of three space frame structures. The designs obtained using the two algorithms were compared to each other. The comparisons showed that the second algorithm resulted in lighter frames.

• Journal of KIISE:Software and Applications
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• v.34 no.6
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• pp.562-571
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• 2007

Various researches had been devoted in purpose of improving memory management in terms of performance, efficiency, ease of use, and safety. One of these approaches is a region-based memory management. Each allocation site selects a specific region, after that allocated objects are placed in this region. Memory is reclaimed by destroying the region, freeing all the objects allocated therein. In this paper, we propose reusing of local regions to reduce heap memory usage in memory-limited environments. The basic idea of this proposal is reusing of upper local regions where objects that are allocated to these regions are not accessed until the current method is finished. We believe our method of reusing local regions is able to overcome memory constraints in memory-limited environments.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.264-267
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• 2002

This paper proposed a effective priority selection algorithm named weighted round-robin algorithm and show the implementation result of DMAC priority selection module using prosed weighted round-robin algorithm. I parameterize timing constraints of each functional module, which decide the effectiveness of system. Proposed weighted round-robin algorithm decide the most effective module for data transmission using parameterize timing constraints and update timing parameter of each module for next transmission module selection. I implement DMAC priority selection module using this weighted round-robin algorithm and can improve the timing effective for data transmission from memory to functional module or one functional module to another functional module.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.11
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• pp.836-840
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• 2009

Many researchers have studied flash memory in order to replace hard disk storages. Many FTL algorithms have been proposed to overcome physical constraints of flash memory such as erase-before-write, wear leveling, and poor write performance. Therefore, these constraints should be considered for testing FTL algorithms and the performance evaluation of flash memory. As doing the experiments, we suffer from several problems with costs and settings in experimental configuration. When we, for example, replay the traces of Oracle to evaluate the I/O performance with flash memory, it is hard to extract exact traces of I/O operations in Oracle. Since there are only write operations in the log, it is impossible to gather read operations. In MySQL and SQLite, we can gather the read operations by changing I/O functions in the source codes. But it is not easy to search for the exact points about I/O and even if we can find out the points, we might get wrong results depending on how we modify source codes to get I/O traces. The FlaSim proposed in this paper removes the difficulties when we evaluate the performance of FTL algorithms and flash memory. Our Linux drivers emulate the flash memory as a hard disk. And we can easily obtain the usage statistics of flash memory such as the number of write, read, and erase operations. The FlaSim can be gracefully extended to support the additional modules implemented by novel algorithms and ideas. In this paper, we describe the structure of FTL emulator, development tools and operating methods. We expect this emulator to be helpful for many experiments and research with flash memory.

• Structural Engineering and Mechanics
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• v.45 no.6
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• pp.759-777
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• 2013

In this paper, a topology optimization method based on the element independent nodal density (EIND) is developed for continuum solids with multiple load cases and multiple constraints. The optimization problem is formulated ad minimizing the volume subject to displacement constraints. Nodal densities of the finite element mesh are used a the design variable. The nodal densities are interpolated into any point in the design domain by the Shepard interpolation scheme and the Heaviside function. Without using additional constraints (such ad the filtering technique), mesh-independent, checkerboard-free, distinct optimal topology can be obtained. Adopting the rational approximation for material properties (RAMP), the topology optimization procedure is implemented using a solid isotropic material with penalization (SIMP) method and a dual programming optimization algorithm. The computational efficiency is greatly improved by multithread parallel computing with OpenMP to run parallel programs for the shared-memory model of parallel computation. Finally, several examples are presented to demonstrate the effectiveness of the developed techniques.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.1
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• pp.1-13
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• 2009

Flash memory is widely used as a storage medium of mobile devices such as MP3 players, cellular phones and digital cameras due to its tiny size, low power consumption and shock resistant characteristics. Currently, there are many studies to replace HDD with flash memory because of its numerous strong points. To use flash memory as a storage medium, FTL(Flash Translation Layer) is required since flash memory has erase-before-write constraints and sizes of read/write unit and erase unit are different from each other. Recently, new type of flash memory called "large block flash memory" is introduced. The large block flash memory has different physical structure and characteristics from previous flash memory. So existing FTLs are not efficiently operated on large block flash memory. In this paper, we propose an efficient FTL for large block flash memory based on FAST(Fully Associative Sector Translation) scheme and page-level mapping on data blocks.

• Journal of Ocean Engineering and Technology
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• v.27 no.5
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• pp.36-42
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• 2013

We present the optimum design for the cross-sectional(sizing) and shape optimization of truss structures with natural frequency constraints. The optimum design method used in this paper employs continuous design variables and the Harmony Search Algorithm(HSA). HSA is a meta-heuristic search method for global optimization problems. In this paper, HSA uses the method of random number selection in an update process, along with penalty parameters, to construct the initial harmony memory in order to improve the fitness in the initial and update processes. In examples, 10-bar and 72-bar trusses are optimized for sizing, and 37-bar bridge type truss and 52-bar(like dome) for sizing and shape. Four typical truss optimization examples are employed to demonstrate the availability of HSA for finding the minimum weight optimum truss with multiple natural frequency constraints.

• International journal of advanced smart convergence
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• v.10 no.1
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• pp.142-150
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• 2021

Open-channel SSD is a new type of Solid-State Disk (SSD) that improves the garbage collection overhead and write amplification due to physical constraints of NAND flash memory by exposing the internal structure of the SSD to the host. However, the host-level Flash Translation Layer (FTL) provided for open-channel SSDs in the current Linux kernel consumes host memory excessively because it use page-level mapping table to translate logical address to physical address. Therefore, in this paper, we implemente a selective mapping table loading scheme that loads only a currently required part of the mapping table to the mapping table cache from SSD instead of entire mapping table. In addition, to increase the hit ratio of the mapping table cache, filesystem information and mapping table access history are utilized for cache replacement policy. The proposed scheme is implemented in the host-level FTL of the Linux kernel and evaluated using open-channel SSD emulator. According to the evaluation results, we can achieve 80% of I/O performance using the only 32% of memory usage compared to the previous host-level FTL.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1307-1313
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• 2017

Sensor networks are composed of provide low powered, inexpensive distributed devices which can be deployed over enormous physical spaces. Coordination between sensor devices is required to achieve a common communication. In low cost, low power and short-range wireless environment, sensor networks cope with significant resource constraints. Security is one of main issues in wireless sensor networks because of potential adversaries. Several security protocols and models have been implemented for communication on computing devices but deployment these models and protocols into the sensor networks is not easy because of the resource constraints mentioned. Memory intensive encryption algorithms as well as high volume of packet transmission cannot be applied to sensor devices due to its low computational speed and memory. Deployment of sensor networks without security mechanism makes sensor nodes vulnerable to potential attacks. Therefore, attackers compromise the network to accept malicious sensor nodes as legitimate nodes. This paper provides the different security models as a metric, which can then be used to make pertinent security decisions for securing wireless sensor network communication.