• The Journal of the Korea Contents Association
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• v.11 no.12
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• pp.597-610
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• 2011

In database application developments, data coexists in memory and disk spaces. To manipulate the memory data, the general programing languages are used and to manipulate the disk data, SQL is used. In particular, the procedural languages for the memory manipulation are difficult to create and manage than declarative languages such as SQL. Thus, this paper shows that a particular structure of memory data, tree structured, can be manipulated by SQL. Most of all, the model data of the user interfaces can be represented by a tree structure and thus, it can be processed by SQL except non set computations. The non set computations could be done by helper classes. The SQL memory data manipulation is more suited to the database application developments which have few complex computations.

• Proceedings of the KSME Conference
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• 2007.05a
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• pp.957-962
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• 2007

This paper describes a new mechanism for improving the force of actuators based on shape memory alloys (SMA) by increasing the number at which a coil pattern SMA spring can evenly be heated. This structure accomplishes a high efficient transformation between force and displacement overcoming the main mechanical drawback of shape memory alloys, that being the limit strain. A pantograph manipulator actuated by the introduced new mechanism has been designed for this research. Mechanical structure and driving mechanism of this manipulator are described in detail, and its control algorithm and current amplifier circuit in a position control system are designed.

• IE interfaces
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• v.11 no.2
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• pp.149-157
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• 1998

In this paper, various techniques considering the characteristics of computer memory management are suggested, which can be used in the implementation of simplex method. First, reduction technique of indirect addressing, redundant references of memory, and scatter/gather technique are implemented, and the effectiveness of the techniques is shown. Loop-unrolling technique, which exploits the arithmetic operation mechanism of computer, is also implemented. Second, a subroutine frequently called is written in low-level language, and the effectiveness is proved by experimental results. Third, row-column linked list and Gustavson's data structure are compared as the data structure for the large sparse matrix in LU form. Last, buffering technique and memory-mapped file which can be used in reading large data file are implemented and the effectiveness is shown.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2004.11a
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• pp.287-290
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• 2004

A structure using the two-way shape memory effect (TWSME) returns to its initial shape by increasing or decreasing temperature under initial residual stress. Through the thermo-mechanical constitutive equation of shape memory alloy(SMA) proposed by Lagoudas et al., we simulate the behavior of a double actuator in which two SMA wires are attached to the tip of panel under the initially given residual stress. Through the numerical results conducted in the present study, the proposed actuator device is suitable for repeated actuation. The simulation algorithm proposed in the present study can be applied extensively to the analysis of the assembled .system of SMA-actuator and host structure in the practical applications.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.79-86
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• 2019

For decades, in-memory data structures have been designed for DRAM-based main memory that provides symmetric read/write performances and has no limited write endurance. However, such data structures provide sub-optimal performance for NVM as it has different characteristics to DRAM. With this motivation, we rethink a conventional red-black tree in terms of its efficacy under NVM settings. The original red-black tree constantly rebalances sub-trees so as to export fast access time over dataset, but it inevitably increases the write traffic, adversely affecting the performance for NVM with a long write latency and limited endurance. To resolve this problem, we present a variant of the red-black tree called a hierarchical balanced binary search tree. The proposed structure maintains multiple keys in a single node so as to amortize the rebalancing cost. The performance study reveals that the proposed hierarchical binary search tree effectively reduces the write traffic by effectively reaping the high capacity of NVM.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.911-913
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• 2008

In this work, nonvolatile memory (NVM) devices for system on panel of flat panel display (FPD) were fabricated using low temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology with an oxide-nitride-oxynitride (ONOn) stack structure on glass. The results demonstrate that the NVM devices fabricated using the ONOn stack structure on glass have suitable switching characteristics for data storage with a low operating voltage, a threshold voltage window of more than 1.8 V between the programming and erasing (P/E) states after 10 years and its initial threshold voltage window (${\Delta}V_{TH}$) after $10^5$ P/E cycles.

• Smart Structures and Systems
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• v.4 no.2
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• pp.261-278
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• 2008

The results of the application of shape memory alloy (SMA) prestressing devices on an aqueduct are presented in this paper. The aqueduct was built in 1747 to provide water to the city of Larnaca and to its port. Because of its importance to the cultural heritage of Cyprus, the aqueduct has been selected as one of the case-study monuments in the project Wide-Range Non-Intrusive devices toward Conservation of Historical Monuments in the Mediterranean Area (WIND-CHIME). The Department of Antiquities of Cyprus, acting in a pioneering way, have given their permission to apply the devices in order to investigate their effectiveness in providing protection to the monument against probable catastrophic effects of earthquake excitation. The dynamic characteristics of the structure were determined in two separate occasions and computational models were developed that matched very closely the dynamic characteristics of the structure. In this paper the experimental setup and the measured changes in the dynamic characteristics of the monument after the application of the SMA devices are described.

• Journal of the Semiconductor & Display Technology
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• v.20 no.1
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• pp.54-58
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• 2021

The RGO with controllable oxygen functional groups is a novel material as the active layer of resistive switching memory through a reduction process. We designed a nanoscale conductive channel induced by local oxygen ion diffusion in an Au / RGO+GQD / Al resistive switching memory structure. A strong electric field was locally generated around the Al metal channel generated in BIL, and the local formation of a direct conductive low-dimensional channel in the complex RGO graphene quantum dot region was confirmed. The resistive memory design of the complex RGO graphene quantum dot structure can be applied as an effective structure for charge transport, and it has been shown that the resistive switching mechanism based on the movement of oxygen and metal ions is a fundamental alternative to understanding and application of next-generation intelligent semiconductor systems.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.5
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• pp.452-458
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• 2022

The electro-thermal erasing (ETE) configuration utilizes Joule heating intentionally generated at word-line (WL). The elevated temperature by heat physically removes stored electrons permanently within a very short time. Though the ETE configuration is a promising next generation NAND flash memory candidate, a consideration of power efficiency and erasing speed with respect to device structure and its scaling has not yet been demonstrated. In this context, based on 3-dimensional (3-D) thermal simulations, this paper discusses the impact of device structure and scaling on ETE efficiency. The results are used to produce guidelines for ETEs that will have lower power consumption and faster speed.

• IEMEK Journal of Embedded Systems and Applications
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• v.7 no.4
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• pp.201-207
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• 2012

Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.