• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.12
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• pp.77-84
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• 2005

The orthogonal frequency division multiplexing (OFDM) technique and the single carrier with cyclic prefix (SC-CP) scheme are very attractive solutions for wireless applications, being computationally efficient since equalization is performed in the frequency domain. The equalizer could not entirely handle significant mean. Doppler shift. This motivates the use of a phase error tracking loop that operates jointly with the frequency equalizer. This paper describes the effect of the mean phase error and the performance of the proportional equalizer coupled with a phase error tracking loop based on decision-directed method. Furthermore, simulation results show that we can reduce the computational toad of the tracking loop with minimal performance degradation.

• Journal of Advanced Navigation Technology
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• v.18 no.4
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• pp.341-346
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• 2014

This paper has presented the design and fabrication of phase correlator for wideband digital frequency discriminator (DFD) operating over the 6.0 to 18.0 GHz frequency range. Fabricated DFD phase correlator has been measured I or Q output signal, and analyzed frequency discrimination error. The operation of the proposed mixer type correlator has been analyzed by deriving some analytic equations. To design the phase correlator, this paper has modeled and simulated IQ mixer and 8-way power divider by using RF simulation tool. Designed phase correlator has fabricated and measured. The phase error and frequency discrimination error have been presented using by measured I and Q output signal. Over the 6.0~18.0 GHz range, the root mean square(RMS) phase error is $4.81^{\circ}$, RMS and frequency discrimination error is 1.49 MHz, RMS.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.11
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• pp.68-76
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• 2014

This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.101-102
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• 2006

Similar to Orthogonal Frequency Division Multiplexing (OFDM), a Single Carrier with Frequency Domain Equalization (SC-FDE) system is computationally efficient since equalization is performed on a block of data in the frequency domain. In coherent QAM schemes, the mean phase rotation error caused by the residual carrier frequency offset may lead to serious degradation. When the frequency equalizer is combined with the mean phase error tracking algorithm, its performance can be enhanced noticeably.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.3
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• pp.37-45
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• 1982

This paper is a sequel of the Part I paper[1] on the modified digital Costas loop. In this Part II we analyze the performance of the system in the presence of noise. It is shown that, when the input signal is corrupted by additive white Gaussian noise, the noise process in the loop becomes Rician as a result of the tan-1 (.) function of the phase error detector. Steady state probability density functions of phase errors of the first-and second-order loops have been obtained by solving the Chapman-Kolmogorov equation numerically. Also, the mean and variance of phase error in the steady state have been obtained analytically, and are compared with the results obtained by computer simulation.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.12 no.8
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• pp.616-625
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• 2002

In this paper, we drove the filtered-x least mean fourth (FXLMF) algorithm where the error raised to the power of four is minimized and analyzed its convergence behavior for a multiple sinusoidal acoustic noise and Gaussian measurement noise. The application of the FXLMF adaptive filter to active noise control requires to estimate the transfer characteristics of the acoustic path between the output and the error signal of the adaptive controller. The results of the convergence analysis of the FXLMF algorithm indicate that the effects of the parameter estimation inaccuracy on the convergence behavior of the algorithm are characterized by two distinct components phase estimation error and estimated gain. In particular, the convergence is shown to be strongly affected by the accuracy of the phase response estimate. Also, we newly show that the convergence behavior can differ depending on the relative sizes of the Gaussian noise and the convergence constant.

• Communications for Statistical Applications and Methods
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• v.17 no.2
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• pp.165-181
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• 2010

This paper presents some chain ratio-type estimators for estimating finite population variance using two auxiliary variables in two phase sampling set up. The expressions for biases and mean squared errors of the suggested c1asses of estimators are given. Asymptotic optimum estimators(AOE's) in each class are identified with their approximate mean squared error formulae. The theoretical and empirical properties of the suggested classes of estimators are investigated. In the simulation study, we took a real dataset related to pulmonary disease available on the CD with the book by Rosner, (2005).

• Journal of electromagnetic engineering and science
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• v.5 no.1
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• pp.26-30
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• 2005

It is important to know phase offsets of PN(Pseudo Noise) sequences in spread spectrum communications since the acquisition is equivalent to making a phase offset between a receiving PN sequence and a PN sequence of local PN generator be identical. In this paper, a phase offset enumeration method for PN sequences with error detection, and its application to the synchronization are proposed. The phase offset enumeration for an n-tuple PN sequence and its error detection are performed when one period of the sequence is received. Once the phase offset of the receiving sequence is calculated, we can easily accomplish the synchronization by initializing shift registers of a local PN generator according to the phase offset value. The mean acquisition time performance of the proposed scheme was derived analytically. Since this synchronization scheme can be realized by using simple circuit and acquires very rapid acquisition in high SNR but shows performance degradation in low SNR, it can be especially useful in indoor and office environments.

• Communications for Statistical Applications and Methods
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• v.17 no.3
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• pp.391-411
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• 2010

For estimating the mean of a finite population, three classes of estimators using multi-auxiliary information with unknown means using two phase sampling in presence of non-response have been proposed with their properties. Asymptotically optimum estimator(AOE) in each class has been identified along with their mean squared error formulae. An empirical study is also given.

• ETRI Journal
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• v.35 no.4
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• pp.638-643
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• 2013

This paper presents a 5-bit digital step attenuator (DSA) using a commercial 0.18-${\mu}m$ silicon-on-insulator (SOI) process for the wideband phased array antenna. Both low insertion loss and low root mean square (RMS) phase error and amplitude error are achieved employing two attenuation topologies of the switched path attenuator and the switched T-type attenuator. The attenuation coverage of 31 dB with a least significant bit of 1 dB is achieved at DC to 20 GHz. The RMS phase error and amplitude error are less than $2.5^{\circ}$ and less than 0.5 dB, respectively. The measured insertion loss of the reference state is less than 5.5 dB at 10 GHz. The input return loss and output return loss are each less than 12 dB at DC to 20 GHz. The current consumption is nearly zero with a voltage supply of 1.8 V. The chip size is $0.93mm{\times}0.68mm$, including pads. To the best of the authors' knowledge, this is the first demonstration of a low phase error DC-to-20-GHz SOI DSA.