• Journal of Ship and Ocean Technology
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• v.8 no.4
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• pp.26-33
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• 2004

PFFEM software, PFADS has been developed for the vibration predictions and analysis of coupled system structures in medium-to-high frequency ranges. PFFEM is numerical method which solves energy governing equation using finite element technique for complicated structures where the exact solutions are not available. Through the upgrades, present PFADS R3 could cover the general beam and plate structures including various kinds of beam-plate rigid joints and other joint systems such as spring-damper junction and rigid bar connection. This software is composed of 3 parts; translator, model converter and solver. The translator makes its own FE-model from bulk data of commercial FE software, and the model converter is used to convert FE-model to PFFE-model automatically. The solver calculates vibrational energy density and intensity for PFFE-model by solving global matrix equations of PFFEM. For the applications of real transportation systems, a container ship model has been examined with respect to major parameters, and reliable results have been obtained.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1025-1035
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• 2016

Luenberger observer (LO)-based sensorless multi-loop control of a converter requires an iterative trial-and-error design process, considering that many parameters should be determined, and loop gains are indirectly related to the closed-loop characteristics. Robust H∞ control adopts a compact sensorless controller. The algebraic Riccati equation (ARE)-based and linear matrix inequality (LMI)-based H∞ approaches need an exhaustive procedure, particularly for a low-order controller. Therefore, in this study, a novel robust H∞ synthesis approach is proposed to design a low-order sensorless controller for boost converters, which need not solve any ARE or LMI, and to parameterize the controller by an adjustable parameter behaving like a "knob" on the closed-loop characteristics. Simulation results show the straightforward closed-loop characteristics evaluation and better dynamic performance by the proposed H∞ approach, compared with the LO-based sensorless multi-loop control. Practical experiments on a digital processor confirmed the simulation results.

• Proceedings of the KIPE Conference
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• 2015.11a
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• pp.119-120
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• 2015

ITER 한국사업단은 AC/DC Converter 최종설계검토(FDR)를 2014년 4월에 끝내고, 제작에 관련된 준비사항 점검인 MRR (Manufacturing Readiness Review)를 2014년 10월에 수행하였다. 1차 제작공정인 CCU/L 컨버터와 관련 I&C System은 2014년 11월부터 제작에 착수하여 곧 FAT(Factory Acceptance Test)를 앞두고 있다. 이 시점에서 중요한 것은 FAT를 앞둔 제작된 기기가 ITER의 설계요건을 충분히 만족하는지에 대한 검증을 하는 것이다. 본 논문은 초전도자석 및 컨버터의 이상상태 또는 고장 시에 장치를 보호하는 중요한 Plant Interlock System(PIS)이 ITER의 설계요건을 충실히 반영하였는지 확인하기 위한 요건추적매트릭스(RTM) 기법을 소개하고, Interlock System의 중요기능인 사고 시 초전도 코일에 충전된 에너지를 급속 방전하기 위한 장치인 DLIB와의 연계기능에 적용한 예를 보이고자 한다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.11
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• pp.61-66
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• 2005

This paper describes a 10-bit 210MHz CMOS current-mode Digital-to-Analog Converter (DAC) consisting of 6 bit MSB current cell matrix Sub-DAC, 2 bit mSB unary current source Sub-DAC, and 2 bit LSB binary weighting Sub-DAC for Wireless LAN application. A new deglitch circuit is proposed to control a crossing point of signals and minimize a glitch energy. The proposed 10-bit CMOS current mode DAC was designed by a $0.35{\mu}m$ CMOS double-poly four-metal technology rate of 210MHz, DNL/INL of ${\pm}0.7LSB/{\pm}1.1LSB$, a glitch energy of $76pV{\cdot}sec$, a SNR of 50dB, a SFDR of 53dB at 200MHz sampling clock and power dissipation of 83mW at 3.3V

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.15-22
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• 2006

In this paper, 1.8V 8-bit 500MSPS Low-power CMOS Digital-to-Analog Converter(DAC) for UWB(Ultra Wide Band) Communication Systeme is proposed. The architecture of the DAC is based on a current steering 6+2 full matrix type which has low glitch and high linearity. In order to achieve a high speed and good performance, a current cell with a high output impedance and wide swing output range is designed. Further a thermometer decoder with same delay time and low-power switching decoder for high efficiency performance are proposed. The proposed DAC was implemented with TSMC 0.18um 1-poly 6-metal N-well CMOS technology. The measured SFDR was 49dB when the output frequency was 50MHz at 500MS/s sampling frequency. The measured INL and DNL were 0.9LSB and 0.3LSB respectively. The DAC power dissipation was 20mW and the effective chip area was $0.63mm^2$.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.673-675
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• 2004

This study proposes controller with voltage-compensated drivers for producing gray-scaled pictures on passive matrix organic light emitting diodes (PMOLEDs) panels. The controller includes voltage type drivers so the output impedance of the driver is far less than that of the current-type driver. Its low output impedance provides better electron-optical properties than those of traditional current drivers. A free running clock and a group of counters are applied to the gray-scaled function so that phase lock loop (PLL) circuit can be reduced in the controller. A pre-charge function is used to enhance performance of the luminance of an active OLED pixel. As a result, distribution of the low gray level portion is achieved linear relationship with input data. In this work, the digital part of the proposed controller is implemented using FPGA chips, and analog parts are combined with a digital-analog converter (DAC) and analog switches. A still image is displayed on a $48^{\ast}64$ PMOLEDs panel to assess the luminance performance fir the controller. Based on its cost requirement and luminance performance, the controller is qualified to join the market for driving PMOLEDs panels.

• Journal of Power Electronics
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• v.12 no.4
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• pp.615-622
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• 2012

The switching frequency of the power electronic devices used in large synchronous motor drives is usually kept low (less than 1 kHz) to reduce the switching losses and to improve the converter power capability. However, this results in a couple of problems, e.g. an increase in the harmonic components of the stator current, and an undesired cross-coupling between the magnetization current component ($i_m$) and the torque component ($i_t$). In this paper, a novel complex matrix model of electrically excited synchronous motors (EESM) was established with a new control scheme for coping with the low switching frequency issues. First, a hybrid observer was proposed to identify the instantaneous fundamental component of the stator current, which results in an obvious reduction of both the total harmonic distortion (THD) and the low order harmonics. Then, a novel complex current controller was designed to realize the decoupling between $i_m$ and $i_t$. Simulation and experimental results verify the effectiveness of this novel control system for EESM drives.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.1
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• pp.19-24
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• 2017

Nowadays, based on the advancement of IT techniques, innovative products combining IT techniques to PA system are developing. In this paper, we presented the hybrid mixer controller for digital PA system. We develop the integrated mixer controller which includes the digital mixer composing an existing digital PA system and function of digital integrated controller. Developed integrated mixer controller consists of multichannel mixer function with 16 audio input channels, 8 output channels. And, it has an equalizer for processing digital audio signal, matrix and limiter. Also, the developed controller has some features such as internet connection for controlling of overall PA system and remote monitoring of mixer process condition.

• Proceedings of the KIEE Conference
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• 2008.04c
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• pp.224-226
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• 2008

본 논문에서는 매트릭스 컨버터를 이용하여 풍력을 에너지원으로한 영구자석형 동기 발전기의 계통연계방법을 제안하고 시뮬레이션으로 타당성을 검증한다. 풍속의 변화에 따라 영구자석형 동기발전기 속도가 변하며, 발전기 속도의 변화로 인해 발전전압의 크기와 주파수가 변한다. 이렇게 가변하는 발전 전압과 주파수를 계통전압의 고정된 전압 크기와 주파수로 변환하는 전력변환장치로써 기존의 PWM AC/DC/AC 컨버터 대신에 매트릭스 컨버터를 사용하여 직접적으로 AC-AC 변환을 한다. 매트릭스 컨버터가 가지고 있는, DC 링크단의 대용량 캐패시터가 필요없고; 양방향전력흐름을 제어할 수 있고, 사용자가 원하는 출력전압의 크기, 주파수, 역률을 임의로 제어 할 수 있는 이점을 사용하여 매트릭스 컨버터를 이용한 영구자석형 동기발전기의 계통연계에 대한 시뮬레이션 결과를 소개한다.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.921_922
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• 2009

본 논문에서는 매트릭스 컨버터의 입력 필터를 설계하고 실험을 수행한 후 입력 파형 비교를 통하여 타당성을 검증하고 분석한다. 매트릭스 컨버터는 18개의 양방향 스위치로 구성되어 있으며, 출력 전압을 합성하기 위해 각각의 스위치가 실시간으로 빠르게 온-오프 한다. 이러한 스위칭 과정에서 고차 고조파가 발생하고, 이 고조파는 매트릭스 컨버터 주위에 연결된 각종 기기에 영향을 미친다. 이러한 영향을 줄이기 위해 설치한 것이 입력필터이다. 본 논문에서는 적절한 입력필터의 소자값을 계산해 내는 과정을 설명하고 이를 구현한 후, 실험을 통해 필터의 설치 전후의 입력 전류 고조파 왜곡율(THD) 등 파형의 변화를 비교하여 설계 값의 타당성과 필터의 적정성을 알아본다.