• Journal of the Korean Society of Manufacturing Process Engineers
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• 제10권4호
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• pp.57-63
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• 2011

The aim of this study is to analyze turning process using commercial FEM simulation code. Various simulation models of orthogonal cutting process for 3 layers of metallic material have been simulated and analyzed. The workpiece material used for the orthogonal plane-strain metal cutting simulation consists of three layers, which are Allow Tool Steel, Aluminum and Stainless Steel. The finite element model is composed of a deformable workpiece and a rigid tool. The tool penetrates through the workpiece at a constant speed and constant feed rate. As an analytical result, detailed cutting temperature, strain, pressure, residual stress for both a tool and each layer of workpiece were obtained during the turning process. It has been closely observed that the chip flow curve deforms continuously.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제21권1호
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• pp.73-78
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• 2008

A resistor network model for the horizontal AlInGaN LED was investigated, The parameters of the proposed model are extracted from the test dies and $350{\mu}m$ LED, The center of the P-area is the optimal position of a P-electrode by the simulation using the model. Also the optimal chip size of the LED for the new target current was investigated, Comparing the simulation and fabrication result, the errors for the forward voltage and the light power are average 0,02 V, 8 % respectively, So the proposed resistor network model with the linear forward voltage approximation and the exponential light power model are useful in the simulation for the horizontal AlInGaN LED.

• Korean Journal of Computational Design and Engineering
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• 제2권3호
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• pp.161-174
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• 1997

In this paper, the techniques for graphic simulation of material removal process are described. The concepts of the bounding box and base plane are proposed. With these concepts, a real-time shaded display of a Z-map model being milled by a cutting tool following an NC path can be implemented very efficiently. The base planes make it possible to detect the visible face of Z-map model effectively. And the bounding box of tool sweep volume provides minimum area of screen to be updated. The proposed techniques are suitable for implementation in raster graphic device and need a few memories and a small amount of calculation. Proposed method is written in C and executable on MS-Windows95 and Window-NT.

• Proceedings of the Korea Concrete Institute Conference
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• 한국콘크리트학회 2006년도 춘계학술발표회 논문집(I)
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• pp.474-477
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• 2006

To predict thermal stress independent of uncertain material properties of early age concrete, such as elastic modulus and creep, thermal stress device is used. In order to verify the application of various degree of constraint in the thermal stress device, a series of experiments were performed on mass concrete followed by numerical simulation. The application of various degrees of constraint can be achieved by using constraint frame material with different thermal expansion coefficient, length, and cross sectional area. Temperature development in the real structure has been simulated using temperature and humidity control chamber. The results from experiments and numerical analysis show that the thermal stresses estimated from simulation agree well with the general stress variations in the real structure even though the properties of concrete are uncertain.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.410-413
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• 2002

In this paper, the performance of high-k dielectric is modeled by observing electrical characteristics through the process and device simulation. ZrO$_2$ on Si substrate is used as test structures to characterize the current-voltage and the capacitance-voltage profiles. In order to verify the simulation results, the experimental results are used as a reference. Based on the modeling results, the methodology can be a potential tool to predict the characteristics of the ZrO$_2$ dielectric.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제14권2호
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• pp.169-174
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• 2001

The electron transport coefficients(the electron drift velocity, W, and the longitudinal and transverse diffusion coefficient, D$_{L}$ and D$_{T}$) in SiH$_4$-Ar mixtures containing 0.5% and 5.0% monosilane were calculated over the E/N range from 0.01 to 300 Td and over the gas pressure range 0.5, 1.0 and 1.5 Torr by the time-of-flight(TOF) method of the Boltzmann equation(BE.) and Monte-Carlo simulation(MCS). The electron energy distribution function in each SiH$_4$-Ar mixtures at E/N=10 Td and L=0.2 cm, which in equilibrium region in the mean electron enregy were compared.red.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.210-210
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• 2010

에너지 하베스트 기술은 자연의 빛에너지, 휴대용 기기 탑재/부착장치의 미세 진동에너지, 걷거나 뛰는 인간의 신체활동으로 인한 소산에너지 등을 흡수하여 전기에너지로 변환, 전자기기의 전력으로 사용하는 재생형 에너지원이다. 본 논문에서는 그 중 주변 환경에서 에너지를 끌어 쓸 수 있는 기술 중 압전 효과 방식을 이용한 진동 형태의 에너지 하베스트 기술을 활용하여 설계하고 FEM simulation을 통해 분석해보았다. 압전 물질로는 PZT를 사용하고 메탈기반의 캔틸레버로는 구리를 사용하여 크기를 길이, 넓이, 폭 각각 $6{\times}4{\times}0.025mm^3$으로 모델링하여 444Hz의 공진주파수에서 응력이 $2.68e^{+5}Pa$ 발생하는 결과를 얻었다. 그 결과 $d_{33}$ 모드의 전극형태에서 전압을 2.56V 얻을 수 있음을 추론할 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.51-51
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• 2010

We have proposed a new configuration for the improvement of neutron yield without the application of external ion sources in an inertial electrostatic confinement (IEC) device. The application of a double grid cathode to the IEC device is expected to generate a higher ion current than a single grid cathode. This paper verifies the effect of the double grid cathode by both fluid and particle simulation. Through the fluid simulation the optimal shape and applied voltage of the double grid cathode is determined, and through the particle simulation the usefulness of that is confirmed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제23권4호
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• pp.287-292
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• 2010

Effect of conductance factors on performance of vacuum system was simulated for optimum design of vacuum system. In this investigation, the feasibility of modeling mechanism for VacSim$^{Multi}$ simulator was proposed. Application specific design of vacuum system is required to meet the particular process conditions for various industrial implementations of vacuum equipments. Geometry and length, diameter of exhaust pipeline were modeled as simulation modeling variables for conductance effects. Series vacuum system was modeled and simulated with varied dimensions and structures of exhaust pipeline. Variation of pipeline diameter showed the more significant effects on vacuum characteristics than that of pipeline length variations. It was also observed that the aperture structure of pipeline had the superior vacuum characteristics among the modeled systems.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제21권8호
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• pp.706-710
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• 2008

The substrate bias effect on the current level of SOI-MOSFETs for high temperature operation has been investigated. In this work, we demonstrate the current level of SOI-MOSFETs can be controlled at different temperatures by applying a control bias to the substrate, showing that all current levels below T=150$^{\circ}C$ can be adjusted to a constant current level. 2D numerical simulation results show that substrate bias effectively controls the current conduction; as the substrate bias effectively lower the potential of the channel, inversion carrier generation is effectively controlled and consequently a constant current conduction level is achieved up to T=150$^{\circ}C$. We also demonstrate that the device simulated in this work has same operation at any temperature below T=150$^{\circ}C$ through mixed mode simulation.