• Structural Engineering and Mechanics
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• 제4권4호
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• pp.415-424
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• 1996

This paper presents a newly suggested calculation method in which an arbitrary quadrilateral element with curved sides is transformed to a normal rectangular one by mapping of coordinates, then the two-dimensional spline is adopted to approach the displacement function of this element. Finally the solution can be obtained by the least-energy principle. Thereby, the application field of Spline Finite Element Method will be extended.

• 전자공학회논문지A
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• 제31A권4호
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• pp.106-115
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• 1994

This paper presents the design of a technology mapping system for optimizing delays of combinational and synchronous sequential logic circuits. The proposed system performs delay optimization for combinational logic circuits by remapping, buffering, and gate merging methods through the correct delay calculation in which the loading values are considered. To get time optimized synchronous sequential circuits, heuristic algorithms are proposed. The proposed algorithms reallocate registers by considering the critical path characteristics. Experimental results show that the proposed system produces a more optimized technology mapping for MCNC benchmarks compared with mis-II.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제13권8호
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• pp.3962-3980
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• 2019

To deal with single sample face recognition, this paper presents a patch based semi-supervised linear regression (PSLR) algorithm, which draws facial variation information from unlabeled samples. Each facial image is divided into overlapped patches, and a regression model with mapping matrix will be constructed on each patch. Then, we adjust these matrices by mapping unlabeled patches to $[1,1,{\cdots},1]^T$. The solutions of all the mapping matrices are integrated into an overall objective function, which uses ${\ell}_{2,1}$-norm minimization constraints to improve discrimination ability of mapping matrices and reduce the impact of noise. After mapping matrices are computed, we adopt majority-voting strategy to classify the probe samples. To further learn the discrimination information between probe samples and obtain more robust mapping matrices, we also propose a multistage PSLR (MPSLR) algorithm, which iteratively updates the training dataset by adding those reliably labeled probe samples into it. The effectiveness of our approaches is evaluated using three public facial databases. Experimental results prove that our approaches are robust to illumination, expression and occlusion.

• Journal of applied mathematics & informatics
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• 제35권3_4호
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• pp.313-321
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• 2017

In this note we establish a new non-convex hybrid iteration algorithm corresponding to Khan iterative process [4] and prove strong convergence theorems of common fixed points for a uniformly closed asymptotically family of countable quasi-Lipschitz mappings in Hilbert spaces. Moreover, the main results are applied to get the common fixed points of finite family of quasi-asymptotically nonexpansive mappings. The results presented in this article are interesting extensions of some current results.

• 디지털산업정보학회논문지
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• 제4권3호
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• pp.77-83
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• 2008

In this paper, CPLD low power technology mapping for reuse module design under the time constraint is proposed. Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource. Also, we are obtainable the optimal the scheduling result in experimental results of our using chaining and multi-cycling in the scheduling techniques. Low power circuit make using CPLD technology mapping algorithm for selection reuse module by scheduling.

• 한국정보통신학회논문지
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• 제11권12호
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• pp.2306-2310
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• 2007

본 논문은 FPGA 기술 매핑을 위한 소모 전력을 고려한 재사용 모듈 생성 알고리즘을 제안한다. 제안한 알고리즘은 FPGA 기술 매핑을 위해 사용되는 재사용 모듈에 대해 소모 전력을 고려하여 RT 라이브러리를 생성하는 알고리즘이다. 소모 전력 계산을 위해 회로를 구현하고자 하는 FPGA를 선정한다. 선정된 FPGA를 구성하고 있는 LUT의 조건을 고려하여 전체 소모 전력이 최소가 되도록 기술 매핑을 수행한다. 이러한 정보를 이용하여 할당된 결과의 모듈들 중에서 주어진 소모 전력에 맞는 모듈을 선정하여 회로를 구현한다.

• 한국측량학회지
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• 제31권6_2호
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• pp.593-599
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• 2013

China's Mapping Satellite-1, developed by the China Aerospace Science and Technology Corporation (CASC), was launched in three years ago. The data from Mapping Satellite-1 are able to use for efficient surveying and geometric mapping application field. In this paper, we fuse the panchromatic and multispectral images of Changchun area, which are obtained from the Mapping Satellite-1, the one that is the Chinese first transmission-type three-dimensional mapping satellite. The four traditional image fusion methods, which are HPF, Mod.IHS, Panshar and wavelet transform, were used to approach for effectively fusing Mapping Satellite-1 remote sensing data. Subsequently we assess the results with some commonly used methods, which are known a subjective qualitative evaluation and quantitative statistical analysis approach. Consequently, we found that the wavelet transform remote sensing image fusion is the optimal in the degree of distortion, the ability of performance of details and image information availability among four methods. To further understand the optimal methods to fuse Mapping Satellite-1 images, an additional study is necessary.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권6호
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• pp.634-646
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• 2015

Coarse-Grained Reconfigurable Architecture (CGRA) is a very promising platform that provides fast turn-around-time as well as very high energy efficiency for multimedia applications. One of the problems with CGRAs, however, is application mapping, which currently does not scale well with geometrically increasing numbers of cores. To mitigate the scalability problem, this paper discusses how to use the SIMD (Single Instruction Multiple Data) paradigm for CGRAs. While the idea of SIMD is not new, SIMD can complicate the mapping problem by adding an additional dimension of iteration mapping to the already complex problem of operation and data mapping, which are all interdependent, and can thus significantly affect performance through memory bank conflicts. In this paper, based on a new architecture called SIMD reconfigurable architecture, which allows SIMD execution at multiple levels of granularity, we present how to minimize bank conflicts considering all three related sub-problems, for various RA organizations. We also present data tiling and evaluate a conflict-free scheduling algorithm as a way to eliminate bank conflicts for a certain class of mapping problem.

• 한국게임학회 논문지
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• 제19권6호
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• pp.49-60
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• 2019

Interior Mapping은 효율적으로 그래픽 리소스를 최적화하는 방법들 중에 하나로 사용되어왔다. 본 논문에서는 보편화 된 게임엔진인 Unreal Engine 4를 활용하여 Interior Mapping을 적용했을 시 3D 게임 내의 성능 변화를 검증하기 위해 실제 모델링과 Interior Mapping의 렌더링 속도(FPS), 폴리곤 개수, 쉐이더 복잡도, 각각의 리소스 용량을 비교하였다. 또한, 효율적인 기술의 적용을 위해 큐브 맵 텍스처의 해상도와 세부 정보에 따른 성능 차이를 검증하였다.

• 대한수학회지
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• 제45권2호
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• pp.377-392
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• 2008

Let X be a real reflexive Banach space with a uniformly $G\hat{a}teaux$ differentiable norm, C a nonempty closed convex subset of X, T : C $\rightarrow$ X a continuous pseudocontractive mapping, and A : C $\rightarrow$ C a continuous strongly pseudocontractive mapping. We show the existence of a path ${x_t}$ satisfying $x_t=tAx_t+(1- t)Tx_t$, t $\in$ (0,1) and prove that ${x_t}$ converges strongly to a fixed point of T, which solves the variational inequality involving the mapping A. As an application, we give strong convergence of the path ${x_t}$ defined by $x_t=tAx_t+(1-t)(2I-T)x_t$ to a fixed point of firmly pseudocontractive mapping T.